Abstract is missing.
- Exploiting error detection latency for parity-based soft error detectionGökçe Aydos, Görschwin Fey. 3-8 [doi]
- System-level reliability evaluation through cache-aware software-based fault injectionFiras Kaddachi, Maha Kooli, Giorgio Di Natale, Alberto Bosio, Mojtaba Ebrahimi, Mehdi Baradaran Tahoori. 9-14 [doi]
- A fault injection platform for the analysis of soft error effects in FPGA soft processorsAitzan Sari, Mihalis Psarakis. 15-20 [doi]
- Parity Waterfall methodJaroslav Borecky, Martin Kohlík, Hana Kubátová. 21-26 [doi]
- Comparison of gate-driven and bulk-driven current mirror topologiesMatej Rakus, Viera Stopjaková, Daniel Arbet. 27-30 [doi]
- A chaotically injected timing technique for ring-based oscillatorsYo-Hao Tu, Kuo-Hsing Cheng, Wei-Ren Wang, Jen-Chieh Liu, Hong-Yi Huang. 31-34 [doi]
- Optical receivers in 0.35 μm BiCMOS for heterogeneous 3D integrationDinka Milovancev, Paul Brandl, Nemanja Vokic, Bernhard Goll, Kerstin Schneider-Hornstein, Horst Zimmermann. 35-39 [doi]
- Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technologyDaniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Juraj Brenkus. 40-45 [doi]
- Multi-objective BDD optimization for RRAM based circuit designSaeideh Shirinzadeh, Mathias Soeken, Rolf Drechsler. 46-51 [doi]
- FPGA architecture of multi-codeword LDPC decoder with efficient BRAM utilizationSergiu Nimara, Oana Boncalo, Alexandru Amaricai, Mircea Popa. 52-55 [doi]
- A general approach for comparing metastable behavior of digital CMOS gatesThomas Polzer, Andreas Steininger. 56-61 [doi]
- Hardware implementation of a medium access control layer for industrial wireless LANKlaus Tittelbach-Helmrich, Zoran Stamenkovic. 62-67 [doi]
- Comparative BTI analysis for various sense amplifier designsInnocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor. 68-73 [doi]
- Impedance calculation based method for AC fault analysis of mixed-signal circuitsJuraj Brenkus, Viera Stopjaková, Lukás Nagy, Daniel Arbet. 74-79 [doi]
- A mixed domain sizing approach for RF circuit synthesisEngin Afacan, Günhan Dündar. 80-83 [doi]
- Co-design of CML IO and Interposer channel for low area and power signalingMuhammad Waqas Chaudhary, Andy Heinig. 84-89 [doi]
- Introduction to approximate computing: Embedded tutorialLukás Sekanina. 90-95 [doi]
- 8 Channel neural stimulation ASIC for epidural visual cortex stimulation with on board 90 ppm/°C current referenceDmitry Osipov, Steffen Paul. 96-101 [doi]
- BioSoC: Highly integrated System-on-Chip for health monitoringKrzysztof Siwiec, Krzysztof Marcinek, Piotr Boguszewicz, Tomasz Borejko, Aleh Halauko, Adam Jarosz, Jakub Kopanski, Ewa Kurjata-Pfitzner, Pawel Narczyk, Maciej Plasota, Andrzej Wielgus, Witold A. Pleskacz. 102-107 [doi]
- Precision human body temperature measurement based on thermistor sensorPawel Narczyk, Krzysztof Siwiec, Witold A. Pleskacz. 108-112 [doi]
- Test of automotive embedded processors with high diagnostic resolutionChristian Gleichner, Heinrich Theodor Vierhaus. 113-118 [doi]
- An effective approach for functional test programs compactionAymen Touati, Alberto Bosio, Patrick Girard, Arnaud Virazel, Paolo Bernardi, Matteo Sonza Reorda. 119-124 [doi]
- FPGA-controlled PCBA power-on self-test using processor's debug featuresBoyang Du, Ernesto Sánchez, Matteo Sonza Reorda, Julio Pérez Acle, Anton Tsertov. 125-130 [doi]
- Sequential test decompressors with fast variable wide spreadingOndrej Novák, Jiri Jenícek, Martin Rozkovec. 132-137 [doi]
- Built-in self-repair architecture generator for digital coresStefan Kristofik, Marcel Baláz. 138-143 [doi]
- High-level modeling and testing of multiple control faults in digital systemsArtjom Jasnetski, Stephen Adeboye Oyeniran, Anton Tsertov, Mario Schölzel, Raimund Ubar. 144-149 [doi]
- A hybrid power modeling approach to enhance high-level power modelsAlejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier. 151-156 [doi]
- Early-stage verification of power-management specification in low-power systems designDominik Macko, Katarina Jelemenska, Pavel Cicak. 157-162 [doi]
- Energy-aware scheduling of FIR filter structures using a timed automata modelErik Ramsgaard Wognsen, René Rydhof Hansen, Kim Guldstrand Larsen, Peter Koch. 163-168 [doi]
- Verification approach based on emulation technologyArkadiusz Koczor, Lukasz Matoga, Piotr Penkala, Adam Pawlak. 169-174 [doi]
- Implementation of DBFN processor for Synthetic Aperture Radar applicationOliver Schrape, Arkadiusz Koczor, Piotr Penkala, Vladimir Petrovic, Milos Krstic. 175-179 [doi]
- Implementation of a real time unit for satellite applicationsAleksandar Simevski, Klaus Schleisiek, Vladimir Petrovic, Norbert Beller, Patryk Skoncej, Günter Schoof, Milos Krstic. 180-185 [doi]
- The design features of low-temperature radiation-hardened instrumentation amplifiers and sensor interfacesAlexei Evgenievich Titov, Nikolay Nikolaevich Prokopenko, Ilya Viktorovich Pakhomov. 186-189 [doi]
- A new method for path criticality calculationRóbert Tamási, Miroslav Siebert, Elena Gramatová, Petr Fiser. 190-193 [doi]
- Low power voltage sensing through capacitance to digital conversionDelong Shang, Yuqing Xu, Kaiyuan Gao, Fei Xia, Alex Yakovlev. 194-199 [doi]
- Efficient triggering of Trojan hardware logicArtemios G. Voyiatzis, Kyriakos G. Stefanidis, Paris Kitsos. 200-205 [doi]
- Gm-C filter with automatic calibration schemeHong-Yi Huang, Kun-Yuan Chen, Jia-Hao Xie, Ming-Ta Lee, Hao-Chiao Hong, Kuo-Hsing Cheng. 206-209 [doi]
- A new user-friendly ATPG platform for digital circuitsMarek Lipovský, Ján Svarc, Elena Gramatová, Petr Fiser. 210-213 [doi]
- Comparing proton and neutron induced SEU cross section in FPGATomas Vanat, Filip Krizek, Jozef Ferencei, Hana Kubatova. 214-217 [doi]
- Integer-N phase locked loop for bluetooth receiver in CMOS 130 nm technologyIgor Butryn, Krzysztof Siwiec, Jakub Kopanski, Witold A. Pleskacz. 218-221 [doi]
- Low-voltage indoor energy harvesting using photovoltaic cellHong-Yi Huang, Shao-Zu Yen, Jhen-Hong Chen, Hao-Chiao Hong, Kuo-Hsing Cheng. 223-226 [doi]
- Optimized differencing algorithm for firmware updates of low-power devicesOndrej Kachman, Marcel Baláz. 227-230 [doi]
- Real-time sleep detection and warning system to ensure driver's safety based on EEGMichael S. Saleab, Mohamed A. Abd El ghany, Ramez M. Toma, Klaus Hofmann. 231-236 [doi]
- A rule-based approach for minimizing power dissipation of digital circuitsSubrata Das, Parthasarathi Dasgupta, Petr Fiser, Sudip Ghosh, Debesh Kumar Das. 237-242 [doi]
- CMOS variable-gain amplifier for low-frequency applicationsMichal Sovcik, Michal Matuska, Daniel Arbet, Viera Stopjaková. 243-246 [doi]