Table of Contents

• Fault-tolerance in the Advanced Automation SystemFlaviu Cristian, Bob Dancey, Jon Dehn. 6-17 [doi]
• Anomaly detection for diagnosisRoy A. Maxion. 20-27 [doi]
• A software fault tolerance experiment for space applicationsD. Simon, C. Hourtolle, H. Biondi, J. Bernelas, P. Duverneuil, S. Gallet, P. Vielcanet, S. De Viguerie, F. Gsell, J. N. Chelotti. 28-35 [doi]
• An experience of a critical software developmentC. Sayet, E. Pilaud. 36-45 [doi]
• Identifying the cause of detected errorsChris J. Walter. 48-55 [doi]
• Polynomial time solvable fault detection problemsSrimat T. Chakradhar, Vishwani D. Agrawal, Michael L. Bushnell. 56-63 [doi]
• Three-valued neural networks for test generationHideo Fujiwara. 64-71 [doi]
• CATCH-compiler-assisted techniques for checkpointingChung-Chi Jim Li, W. Kent Fuchs. 74-81 [doi]
• Cache-aided rollback error recovery (CARER) algorithm for shared-memory multiprocessor systemsRana Ejaz Ahmed, Robert C. Frazier, Peter N. Marinos. 82-88 [doi]
• Cache management in a tightly coupled fault tolerant multiprocessorMichel Banâtre, Philippe Joubert. 89-96 [doi]
• Checkpointing and rollback-recovery in distributed object based systemsLuke Lin, Mustaque Ahamad. 97-104 [doi]
• Design and analysis of test schemes for algorithm-based fault toleranceDechang Gu, Daniel J. Rosenkrantz, S. S. Ravi. 106-113 [doi]
• A novel concurrent error detection scheme for FFT networksD. L. Tao, Carlos R. P. Hartmann, Y. S. Chen. 114-121 [doi]
• A dependence graph-based approach to the design of algorithm-based fault tolerant systemsBapiraju Vinnakota, Niraj K. Jha. 122-129 [doi]
• Hierarchical design and analysis of fault-tolerant multiprocessor systems using concurrent error detectionSuku Nair, Jacob A. Abraham. 130-137 [doi]
• Loss-tolerance for electronic walletsMichael Waidner, Birgit Pfitzmann. 140-147 [doi]
• A formalism for monitoring real-time constraints at run-timeFarnam Jahanian, Ambuj Goyal. 148-155 [doi]
• Impact of reconfiguration logic on the optimization of defect-tolerant integrated circuitsClaude Thibeault, Jean-Louis Houle. 158-165 [doi]
• Fault covers in reconfigurable PLAsNany Hasan, C. L. Liu. 166-173 [doi]
• Availability evaluation of MIN-connected multiprocessors using decomposition techniqueChita R. Das, Lei Tien, Laxmi N. Bhuyan. 176-183 [doi]
• Estimates of MTTF and optimal number of spares of fault-tolerant processor arraysY. X. Wang, José A. B. Fortes. 184-191 [doi]
• An analysis of a reconfigurable binary tree architecture based on multiple-level redundancyYung-Yuan Chen, Shambhu J. Upadhyaya. 192-199 [doi]
• Fault-intolerance of reconfigurable systolic arraysAmiya Nayak, Nicola Santoro, Richard Tan. 202-209 [doi]
• Strategies for reconfiguring hypercubes under faultsPrithviraj Banerjee. 210-217 [doi]
• Distributed algorithms for shortest-path, deadlock-free routing and broadcasting in arbitrarily faulty hypercubesMichael Peercy, Prithviraj Banerjee. 218-225 [doi]
• Limits to the fault-tolerance of a feedforward neural network with learningJos Nijhuis, Bernd Höfflinger, André van Schaik, Lambert Spaanenburg. 228-235 [doi]
• Effects of transient gate-level faults on program behaviorEdward W. Czeck, Daniel P. Siewiorek. 236-243 [doi]
• Failure analysis and modeling of a VAXcluster systemDong Tang, Ravishankar K. Iyer, Sujatha S. Subramani. 244-251 [doi]
• Zero aliasing compressionSandeep K. Gupta, Dhiraj K. Pradhan, Sudhakar M. Reddy. 254-263 [doi]
• Signature analysers based on additive cellular automataAloke K. Das, Debanjan Saha, A. Roy Chowdhury, Susanta Misra, Parimal Pal Chaudhuri. 265-272 [doi]
• Burst asymmetric/unidirectional error correcting/detecting codesSeungjin Park, Bella Bose. 273-280 [doi]
• A highly decentralized implementation model for the programmer-transparent coordination (PTC) scheme for cooperative recoveryKwang-Hae Kim, J. H. You. 282-289 [doi]
• A fault-tolerant strategy for hierarchical control in distributed computing systemsPierre Goyer, Parham Momtahan, Bran Selic. 290-297 [doi]
• Static allocation of process replicas in fault tolerant computing systemsLambert J. M. Nieuwenhuis. 298-306 [doi]
• Specification and proof of a distributed recovery algorithmXinfeng Ye, Brian Warboys, John A. Keane. 307-314 [doi]
• Reliable diagnosis and repair in constant-degree multiprocessor systemsDouglas M. Blough, Andrzej Pelc. 316-323 [doi]
• Optimal multiple syndrome probabilistic diagnosisSunggu Lee, Kang G. Shin. 324-331 [doi]
• Practical application and implementation of distributed system-level diagnosis theoryRonald Bianchini Jr., Ken Goodwin, Daniel S. Nydick. 332-339 [doi]
• Distributed probabilistic fault diagnosis for multiprocessor systemsPiotr Berman, Andrzej Pelc. 340-346 [doi]
• On the modeling of workload dependent memory faultsJürgen Dunkel. 348-355 [doi]
• On the modelling and testing of recovery block structuresGeppino Pucci. 356-363 [doi]
• The transformation approach to the modeling and evaluation of the reliability and availability growthJean-Claude Laprie, Christian Béounes, Mohamed Kaâniche, Karama Kanoun. 364-371 [doi]
• On the design of path delay fault testable combinational circuitsAnkan K. Pramanick, Sudhakar M. Reddy. 374-381 [doi]
• Fault detection and diagnosis of k-UCP circuits under totally observable conditionXiaoqing Wen, Kozo Kinoshita. 382-389 [doi]
• Optimized synthesis of self-testable finite state machinesBernhard Eschermann, Hans-Joachim Wunderlich. 390-397 [doi]
• Techniques for building dependable distributed systems: multi-version software testingJohn P. J. Kelly, Thomas I. McVittie, Susan C. Murphy. 400-407 [doi]
• On the performance of software testing using multiple versionsSusan S. Brilliant, John C. Knight, Paul Ammann. 408-415 [doi]
• Error models for robust storage structuresDavid J. Taylor. 416-422 [doi]
• Using certification trails to achieve software fault toleranceGregory F. Sullivan, Gerald M. Masson. 423-431 [doi]
• Concurrent error detection and correction in real-time systolic sorting arraysSheng-Chiech Liang, Sy-Yen Kuo. 434-441 [doi]
• A software based approach to achieving optimal performance for signature control flow checkingNancy J. Warter, Wen-mei W. Hwu. 442-449 [doi]
• Design of microprocessors with built-in on-line testRégis Leveugle, T. Michel, Gabriele Saucier. 450-456 [doi]
• The minimal test set for sorting networks and the use of sorting networks in self-testing checkers for unordered codesStanislaw J. Piestrak. 457-464 [doi]
• Tolerating transient faults in MARSHermann Kopetz, Heinz Kantz, Günter Grünsteidl, Peter P. Puschner, Johannes Reisinger. 466-473 [doi]
• The error-resistant interactively consistent architecture (ERICA)Carel-Jan L. van Driel, R. J. B. Follon, A. A. C. Kohler, R. P. M. van Osch, J. M. Spanjers. 474-480 [doi]
• The Delta-4 extra performance architecture (XPA)Peter A. Barrett, Andrew M. Hilborne, Peter G. Bond, Douglas T. Seaton, Paulo Veríssimo, Luís Rodrigues, Neil A. Speirs. 481-488 [doi]
• Fast simulation of dependability models with general failure, repair and maintenance processesVictor F. Nicola, Marvin K. Nakayama, Philip Heidelberger, Ambuj Goyal. 491-498 [doi]
• Modeling recovery time distributions in ultrareliable fault-tolerant systemsRobert Geist, Mark Smotherman, Ronald Talley. 499-504 [doi]