Table of Contents

• High-efficient and Comprehensive Modeling of MFIM Ferroelectric Tunnel Junctions for Non-volatile/Volatile ApplicationsYu Li, Hao Jiang, Jie Yu, Xuanyu Zhao, Xiaodong Wang, Qihan Liu, Yingfen Wei, Qi Liu, Ming Liu. 1-4 [doi]
• A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arraysW. Kim, V. Pica, N. Jossart, Farrukh Yasin, Kurt Wostyn, S. Couet, Sidharth Rao. 1-4 [doi]
• Embedded Transformer Hetero-CiM: SRAM CiM for 4b Read/Write-MAC Self-attention and MLC ReRAM CiM for 6b Read-MAC Linear&FC LayersNaoko Misawa, Tao Wang, Chihiro Matsui, Ken Takeuchi. 1-4 [doi]
• Pure-Metal Replacement Gate for Reliable 30 nm Pitch Scaled 3D NAND FlashS. Rachidi, S. Ramesh, Davide Tierno, G. L. Donadio, A. Pacco, J. W. Maes, Y. Jeong, Antonio Arreghini, Geert Van den bosch, Maarten Rosmeulen. 1-4 [doi]
• A 3.75Mb Embedded RRAM IP on 40nm High-Voltage CMOS TechnologyYuan He, Chengxiang Ma, Xiangchao Ma, Yilong Huang, Qianze Zheng, Yue Xi, Qiumeng Wei, Jianing Li, Xiaodong He, Yongqin Wu, Weihai Bu, Kai Zheng, Jin Kang, Jianshi Tang, Bin Gao 0006, Dong Wu, He Qian, Huaqiang Wu. 1-4 [doi]
• AsSeGeS and GeN Heterostructures for Superior OTS PerformanceA. Grun, Z. L. Lui, C. W. Cheng, D. Piatek, E. K. Lai, Y. T. Kuo, Wei-Chih Chien, S. Cheng, M. BrightSky, H. L. Lung, H. Y. Cheng. 1-4 [doi]
• Flash memory revolution: journey from 2D to 3D, migrating to modular memory fabricationRyota Katsumata. 1-4 [doi]
• Engineering nvCap From FEOL to BEOL with Ferroelectric Small-signal Non-destructive ReadTae-Hyeon Kim, Yuan-Chun Luo, Omkar Phadke, James Read, Shimeng Yu. 1-4 [doi]
• Novel Multi-Level Coding and Architecture Enabling Fast Random Access for Flash MemoryNoboru Shibata, Hironori Uchikawa, Taira Shibuya, Hirofumi Inoue. 1-4 [doi]
• Improvement of MAC Accuracy using Oxygen Diffusion Barriers in Resistive Synaptic Cell ArraysYoungjae Kwon, Won-Tae Koo, Sangsu Park, Dong Ik Suh, Gunhee Lee, Hyung-Dong Lee, Youngbae Ahn, Dohee Kim, Seungwook Ryu, Hoseok Em, Seokjoon Kang, Chang-Won Jeong, Junho Cheon, Hyejung Choi, Soo Gil Kim, Seho Lee, Jaeyun Yi, Seonyong Cha. 1-4 [doi]
• SiGe/Si Heterojunction Drain Transistor for Faster 3D NAND Flash Memory EraseDasom Lee, Tsu-Jae King Liu. 1-4 [doi]
• Design Framework for Ferroelectric Gate Stack Engineering of Vertical NAND Structures for Efficient TLC and QLC OperationDipjyoti Das, Lance Fernandes, Prasanna Venkatesan Ravindran, TaeYoung Song, Chinsung Park, Nashrah Afroze, Mengkun Tian, Hang Chen, Winston Chem, Kijoon Kim, Jongho Woo, Suhwan Lim, Kwangsoo Kim, Wanki Kim, Daewon Ha, Shimeng Yu, Suman Datta, Asif Islam Khan. 1-4 [doi]
• Exploring Innovative IGZO-channel based DRAM Cell Architectures and Key Technologies for Sub-10nm NodeDaewon Ha, Y. Lee, S. Yoo, W. Lee, M. H. Cho, K. Yoo, S. M. Lee, S. Lee, M. Terai, T. H. Lee, J.-H. Bae, K. J. Moon, C. Sung, M. Hong, D. G. Cho, K. Lee, S. W. Park, K. Park, B. J. Kuh, S. Hyun, S. J. Ahn, J. H. Song. 1-4 [doi]
• Realistic Noise-aware Training as a Component of the Holistic ACiM Development PlatformJihun Kim, Sangsu Park, Hongju Suh, Youngjae Kwon, Seonghun Lee, Yubin Lee, Kayoung Kim, Eungu Han, Jongil Kim, Kyu-Sung Kim, Hyejung Choi, Seungwook Ryu, Su-Jin Chae, Seho Lee, Soo Gil Kim, Jaeyun Yi, Seonyong Cha. 1-4 [doi]
• 3D-NAND based Filtering Cube with High Resolution 2D Query and Tunable Feature Length for Computational SSDPo-Hao Tseng, Shao-Yu Fang, Yu-Hsuan Lin, Feng-Ming Lee, Jhe-Yi Liao, Yu-Yu Lin, Ming-Hsiu Lee, Kuang-Yeu Hsieh, Keh-Chung Wang, Chih-Yuan Lu. 1-4 [doi]
• Enhanced reliability and trapping behavior in ferroelectric FETs under cryogenic conditionsMaximilian Lederer, Franz Müller 0001, Raik Hoffmann, Ricardo Olivo, Yannick Raffel, Shouzhuo Yang, Sourav De, Roman Potjan, Oliver Ostien, Abdelrahman Altawil, Ayse Sünbül, David Lehninger, Thomas Kämpfe, Konrad Seidel. 1-4 [doi]
• Materials Engineering for High Performance Ferroelectric MemoryAshonita Chavan, Adharsh Rajagopal, Yixin Yan, Isamu Asano, Devanarayanan Ettisserry, Vassil Antonov, Giorgio Servalli, Alessandro Calderoni, Nirmal Ramaswamy. 1-4 [doi]
• Process optimization and cryogenic evaluation of spin-orbit torque magnetic random access memoryZhongkui Zhang, Xiaofei Fan, Danrong Xiong, Huiyan Sun, Xiantao Shang, Bowen Man, Cong Zhang, Shuhui Li, Renjie Su, Chengyuan Sun, Jennifer Zhou, Hongxi Liu, Gefei Wang. 1-4 [doi]
• Self-rectifying non-volatile tunneling synapse: multiscale modeling augmented developmentBastien Beltrando, Marco A. Villena, Mondol Anik Kumar, Shruba Gangopadhyay, Deepak Kamalanathan, E. Smith, N. Kazem, Ghazal Saheli, Stephen Weeks, Michael Haverty, Muthukumar Kaliappan, Andrea Padovani, S. Krishnan, J. Anthis, Luca Larcher, Milan Pesic. 1-4 [doi]
• Optimizing RRAM Performance: A Comparative Analysis of Forming StrategiesThomas Bauvent, Gaël Pillonnet, Gabriel Molas. 1-4 [doi]
• Role of Nitrogen in Suppressing Interfacial States Generation and Improving Endurance in Ferroelectric Field Effect TransistorsSaifei Dai, Songwei Li, Shuangshuang Xu, Fengbin Tian, Junshuai Chai, Jiahui Duan, Wenjuan Xiong, Jinjuan Xiang, Yanrong Wang, Hao Xu, Jing Zhang, Xiaolei Wang, Wenwu Wang. 1-4 [doi]
• Heterogeneous Oxide Semiconductor FETs Comprising Planar FET and Vertical Channel FETs Monolithically Stacked on Si CMOS, Enabling 1-Mbit 3D DRAMHiraki Inoue, Takeya Hirose, Toshiki Mizuguchi, Yusuke Komura, Toshihiko Saito, Minato Ito, Kiyotaka Kimura, Tatsuya Onuki, Yoshinori Ando, Hiromi Sawai, Tsutomu Murakawa, Hitoshi Kunitake, Takanori Matsuzaki, Hajime Kimura, Makoto Ikeda, Shunpei Yamazaki. 1-4 [doi]
• Gate-All-Around SRAM: Performance Investigation and Optimization Towards Vccmin ScalingPratik B. Vyas, Ashish Pal, Gregory Costrini, Benjamin Colombeau, Bala Haran, Subi Kengeri, El Mehdi Bazizi. 1-4 [doi]
• Comprehensive physics-based modeling of post-cycling long-term data retention in 176L 3-D NAND Flash MemoriesKaransingh Thakor, Nikhil Rangarajan, Himanshu Diwakar, Rashmi Saikia, Tarun Samadder, Souvik Mahapatra, Shyam Raghunathan, Yingda Dong. 1-4 [doi]
• Modeling and Demonstration for Multi-level Weight Conductance in Computational FeFET Memory CellWon-Tae Koo, Jae-Gil Lee, Gunhee Lee, Woocheol Lee, Jungwook Woo, Dong Ik Suh, Joongsik Kim, Hyung-Dong Lee, Seho Lee, Jaeyun Yi, Seonyong Cha. 1-4 [doi]
• CMOS-Compatible Low-T Processing Methods for HZO-based DRAM capacitors by E-field CyclingYuanbiao Li, Xinyi Tang, Guangwei Xu, Songming Miao, Xiao Chen, Jiachen Li, Di Lu, Shibing Long. 1-4 [doi]
• Charge trapping challenges of CMOS embedded complementary FeFETsSven Beyer, Dominik Kleimaier, Stefan Dünkel, Halid Mulaosmanovic, Steven Soss, Johannes Müller, Zhouhang Jiang, Kai Ni 0004, Thomas Mikolajick, Haidi Zhou. 1-4 [doi]
• A Novel Program-verify Free and Low Drift Multilevel Operation on Cross-point OTS-PCM for In-Memory Computing ApplicationWei-Chih Chien, C. L. Sung, Robert L. Bruce, C. W. Yeh, H. Y. Cheng, Z. L. Liu, E. K. Lai, C. W. Cheng, J. X. Zheng, A. Grun, A. Ray, D. Daudelin, H. Y. Ho, Matthew BrightSky, H. L. Lung. 1-4 [doi]
• 3D X-DRAM: A Novel 3D NAND-like DRAM Cell and TCAD SimulationsFu-Chang Hsu, Richard J. Huang, Re-Peng Tsay, Jui-Hsin Chang, Chia-Haur Chang, I-Wei Huang, Kevin Hsu. 1-4 [doi]
• D2W Hybrid Bonding Challenges for HBMGaurav Mehta, Jonathan Abdilla, Raymond Hung, El Mehdi Bazizi, Yong Chang Bum, Djuro Bikajlevic, Liu Jiang, Gregory Costrini. 1-4 [doi]
• Performance and Reliability of Technology Qualified 34 Mb Split-Gate eFLASH Macro in 28 nm HKMGRalf Richter, Stefan Dünkel, Bert Müller, Frank Mauersberger, Sven Wittek, Sven Beyer, Jana Böhme, Uwe Ritter, Violetta Sessi, Zhen Xu, Maximilian Drescher, Jinho Kim, Parviz Ghazavi, Yuri Tkachev, Latt Tee, Zonglin Li, Mandana Tadayoni, Fan Luo, Nhan Do, Serguei Jourba, Catherine Decobert, Gilles Festes, Bruno Villard, Thibaut Pate-Cazal. 1-4 [doi]
• Improved 3D DRAM Design Based on Gate-Controlled Thyristor Featuring Two Asymmetrical Horizontal WL's and Vertical BL for Better Cell Size Scaling and Array SelectionWei-Chen Chen, Hang-Ting Lue, Ming-Hung Wu, Yu-Tang Lin, Keh-Chung Wang, Chih-Yuan Lu. 1-4 [doi]
• Gate Side Injection Operating Mode for 3D NAND Flash MemoriesLaurent Breuil, R. Izmailov, Mihaela Ioana Popovici, J. Stiers, Antonio Arreghini, S. Ramesh, Geert Van den bosch, Jan Van Houdt, Maarten Rosmeulen. 1-4 [doi]
• Charge-based Sense Demonstration in 1T-1C HZO FeRAM Arrays to Overcome CBL-induced Bank Size LimitationsOlivier Billoint, Simon Martin 0006, J. Laguerre, L. Hosier, Jean Coignus, Catherine Carabasse, François Andrieu, Laurent Grenouillet. 1-4 [doi]
• 2 DRAM Below Equivalent 10nm NodeHang-Ting Lue, Wei-Chen Chen, Yu-Tang Lin, Keh-Chung Wang, Chih-Yuan Lu. 1-4 [doi]
• Novel Cross-Point Architecture utilizing Distributed Diode Selector for Read Margin AmplificationTaras Ravsher, Andrea Fantini, Kruti Trivedi, Nouredine Rassoul, Harold Dekkers, Attilio Belmonte, Jan Van Houdt, Valeri Afanas'ev, Kurt Wostyn, Sebastien Couet, Gouri Sankar Kar. 1-4 [doi]
• Overcome the End of Life of 3D Flash Memory by Recovery Annealing, Aiming for Carbon Neutrality in Semiconductor ManufacturingHitomi Tanaka, Hajime Sano, Reika Ichihara, Yuta Aiba, Kazuma Hasegawa, Kana Kudo, Chieko Tokunaga, Yasuhito Yoshimizu, Fumie Kikushima, Tomoya Sanuki. 1-4 [doi]
• High Operation Speed(10ns/100ns) and Low Read Current (sub-1μA) 2D Floating Gate TransistorJun Yu, Jiawei Fu, Candong Zhao, Fuwei Zhuge, Qi Chen, Yuhui He, Xiangshui Miao. 1-4 [doi]
• A Novel 3D Gate-All-Around Vertical FeFET with Back-Gate Structure for Disturbance-Less Program OperationBoncheol Ku, Jae-Min Sim, Jae Seok Hur, Jae Kyeong Jeong, Yun Heub Song, ChangHwan Choi. 1-4 [doi]
• Demonstration of High-Growth-Rate Epitaxially Grown Si Channel on 3D NAND Test Vehicle with Memory FunctionalityHao-Ling Tang, Insoo Jung, Frank CC Chin, Luc Thomas, Xin Meng, Arvind Kumar, Jaesoo Ahn, Zuoming Zhu, Abhishek Dube, Mahendra Pakala. 1-4 [doi]
• Present and Future, Challenges of High Bandwith Memory (HBM)Kwiwook Kim, Myeong-Jae Park. 1-4 [doi]
• Modeling and Simulation for DRAM and Flash Memory Technology Exploration and DevelopmentXi-Wei Lin, Salvatore M. Amoroso, Ko-Hsin Lee, Meng Hsuan Ke, Tue Gunst, Pavel Tikhomirov, Plamen Asenov. 1-4 [doi]
• Understanding the Thermal Aspects in Dense RRAM Memory ArraysDaniel Schön, Stephan Menzel. 1-4 [doi]