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Altolaguirre

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Federico A. Altolaguirre

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Publications by 'Federico A. Altolaguirre'

Publications

Viewing Publication 1 - 4 from 4

2015

Active ESD protection for input transistors in a 40-nm CMOS processFederico A. Altolaguirre, Ming-Dou Ker. vlsi-dat 2015: 1-4 [doi]

2014

Power-rail ESD clamp circuit with embedded-trigger SCR device in a 65-nm CMOS processFederico A. Altolaguirre, Ming-Dou Ker. mwscas 2014: 250-253 [doi]

2013

Ultra-low-leakage power-rail ESD clamp circuit in a 65-nm CMOS technologyFederico A. Altolaguirre, Ming-Dou Ker. vlsi-dat 2013: 1-4 [doi]

Low-leakage power-rail ESD clamp circuit with gated current mirror in a 65-nm CMOS technologyFederico A. Altolaguirre, Ming-Dou Ker. iscas 2013: 2638-2641 [doi]

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