Fur-Shing Tsai - researchr alias

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Viewing Publication 1 - 13 from 13

2007

Bridging RTL and gate: correlating different levels of abstraction for design debuggingEric Cheung, Xi Chen, Fur-Shing Tsai, Yu-Chin Hsu, Harry Hsieh. hldvt 2007: 73-80 [doi]

2006

Visibility enhancement for silicon debugYu-Chin Hsu, Fur-Shing Tsai, Wells Jong, Ying-Tsai Chang. dac 2006: 13-18 [doi]

2003

Advanced techniques for RTL debuggingYu-Chin Hsu, Bassam Tabbara, Yirng-An Chen, Fur-Shing Tsai. dac 2003: 362-367 [doi]

2002

Optimal time borrowing analysis and timing budgeting optimization for latch-based designsShi-Zheng Eric Lin, Chieh Changfan, Yu-Chin Hsu, Fur-Shing Tsai. todaes, 7(1):217-230, 2002. [doi]

2000

Timing optimization on routed designs with incremental placementand routing characterizationChieh Changfan, Yu-Chin Hsu, Fur-Shing Tsai. tcad, 19(2):188-196, 2000. [doi]

1999

Post-routing timing optimization with routing characterizationChieh Changfan, Yu-Chin Hsu, Fur-Shing Tsai. ispd 1999: 30-35 [doi]

1997

Layout Modeling and Design Space Exploration in Pss1 SystemFur-Shing Tsai, Yu-Chin Hsu. vlsi, 5(2):211-221, 1997. [doi]

1992

STAR: An automatic data path allocatorFur-Shing Tsai, Yu-Chin Hsu. tcad, 11(9):1053-1064, 1992. [doi]

1990

Hybrid routingYoun-Long Lin, Yu-Chin Hsu, Fur-Shing Tsai. tcad, 9(2):151-157, 1990. [doi]

Data Path Construction and RefinementFur-Shing Tsai, Yu-Chin Hsu. iccad 1990: 308-311

1989

Routing using a pyramid data structureYoun-Long Lin, Yu-Chin Hsu, Fur-Shing Tsai. iccad 1989: 436-439 [doi]

SILK: a simulated evolution routerYoun-Long Lin, Yu-Chin Hsu, Fur-Shing Tsai. tcad, 8(10):1108-1114, 1989. [doi]

1988

A detailed router based on simulated evolutionYoun-Long Lin, Yu-Chin Hsu, Fur-Shing Tsai. iccad 1988: 38-41 [doi]

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