J. Robert Jump - researchr alias

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Viewing Publication 1 - 36 from 36

1994

Execution-Driven Simulation of Multiprocessors: Address and Timing AnalysisSandhya Dwarkadas, J. Robert Jump, James B. Sinclair. tomacs, 4(4):314-338, 1994. [doi]

Execution-Driven Simulation of a Superscalar ProcessorH. A. Rizvi, James B. Sinclair, J. Robert Jump, J. Carson. hicss 1994: 185-194

1993

Execution-Driven Simulation of Shared-Memory MultiprocessorsSandhya Dwarkadas, J. Robert Jump, R. Mukherjee, James B. Sinclair. mascots 1993: 83-86

NETSIM: A General-Purpose Interconnection Network SimulatorJ. Robert Jump, Sridhar Lakshmanamurthy. mascots 1993: 121-125

1991

Efficient Simulation of Parallel Computer SystemsR. G. Convington, Sandhya Dwarkadas, J. Robert Jump, James B. Sinclair, Sridhar Madala. ijcs, 1(1), 1991.

1990

Efficient Simulation of MultiprogrammingW. P. Dawkins, V. Debbad, J. Robert Jump, James B. Sinclair. sigmetrics 1990: 237-238 [doi]

Evaluation of Reduced Bandwidth Multistage NetworksDavid T. Harper III, J. Robert Jump. jpdc, 9(3):304-311, 1990.

1989

Cross-profiling as an efficient technique in simulating parallel computer systemsRichard Covington, J. Robert Jump, James B. Sinclair. compsac 1989: 75-80 [doi]

Efficient simulation of cache memoriesSandhya Dwarkadas, J. Robert Jump, James B. Sinclair. wsc 1989: 1032-1041 [doi]

1988

The Rice Parallel Processing TestbedR. C. Covington, Sridhar Madala, V. Mehta, J. Robert Jump, James B. Sinclair. sigmetrics 1988: 4-11

1987

Performance Evaluation of Reduced Bandwidth Multistage Interconnection NetworksDavid T. Harper III, J. Robert Jump. isca 1987: 171-175

Vector Access Performance in Parallel Memories Using a Skewed Storage SchemeDavid T. Harper III, J. Robert Jump. TC, 36(12):1440-1449, 1987.

1986

Performance Evaluation of Vector Accesses in Parallel Memories Using a Skewed Storage SchemeDavid T. Harper III, J. Robert Jump. isca 1986: 324-328

Performance of Unbuffered Shuffle-Exchange NetworksManoj Kumar, J. Robert Jump. TC, 35(6):573-578, 1986.

1985

Switching Strategies in Shuffle-Exchange Packet-Switched NetworksManoj Kumar, Daniel M. Dias, J. Robert Jump. TC, 34(2):180-186, 1985.

Matrix Multiplication in an Interleaved Array Processing ArchitectureG. Wolf, J. Robert Jump. isca 1985: 11-17

1984

An interleaved array-processing architectureJ. Robert Jump, J. D. Wise, David T. Harper III. afips 1984: 93-100 [doi]

Performance enhancement in buffered delta networks using crossbar switches and multiple linksManoj Kumar, J. Robert Jump. jpdc, 1(2):81-103, 1984. [doi]

1983

Generalized Delta NetworksManoj Kumar, J. Robert Jump. icpp 1983: 10-18

Switching Strategies in a Class of Packet Switching NetworksManoj Kumar, Daniel M. Dias, J. Robert Jump. isca 1983: 284-300

1982

Augmented and pruned n log n multistaged networks: topology and performanceDaniel M. Dias, J. Robert Jump. icpp 1982: 10-12

1981

Analysis and Simulation of Buffered Delta NetworksDaniel M. Dias, J. Robert Jump. TC, 30(4):273-282, 1981.

Packet Switching Interconnection Networks for Modular SystemsDaniel M. Dias, J. Robert Jump. Computer, 14(12):43-53, 1981.

1979

On Functional Equivalences in a Model for Parallel ComputationSusan E. Conry, J. Robert Jump. iandc, 41(3):247-274, June 1979.

Top-Down Design in the Context of Parallel ProgramsN. D. Jotwani, J. Robert Jump. iandc, 40(3):241-257, March 1979.

1978

Effective Pipelining of Digital SystemsJ. Robert Jump, Sudhir Ahuja. TC, 27(9):855-865, 1978.

1977

A Modular Memory Scheme for Array ProcessingS. R. Ahuja, J. Robert Jump. isca 1977: 90-94

1975

On the Interconnection of Asynchronous Control StructuresJ. Robert Jump, P. S. Thiagarajan. JACM, 22(4):596-612, 1975. [doi]

1974

On the Interconnection Structure of Cellular NetworksJ. Robert Jump, Jayang S. Kirtane. iandc, 24(1):74-91, January 1974.

Asynchronous Control ArraysJ. Robert Jump. TC, 23(10):1020-1029, 1974. [doi]

1973

On the Equivalence of Asynchronous Control StructuresJ. Robert Jump, P. S. Thiagarajan. SICOMP, 2(2):67-87, 1973.

1972

Microprogrammed ArraysJ. Robert Jump, Dennis R. Fritsche. TC, 21(9):974-984, 1972. [doi]

On the Equivalence of Asynchronous Control StructuresJ. Robert Jump, P. S. Thiagarajan. focs 1972: 212-223

1971

On the Length of Feedback Shift RegistersJ. Robert Jump, Shreehari Marathe. iandc, 19(4):345-352, November 1971.

1970

R70-29 Uniform Synthesis of Sequential CircuitsJ. Robert Jump. TC, 19(8):765, 1970. [doi]

1969

A Note on the Iterative Decomposition of Finite AutomataJ. Robert Jump. iandc, 15(5):424-435, November 1969.

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