Jan Schier - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 17 from 17

2019

A computer-assisted system for handheld whole-breast ultrasonographyFilip Sroubek, Michal Bartos, Jan Schier, Zuzana Bílková, Barbara Zitová, Jan Vydra, Iva Macová, Jan Danes, Lukás Lambert. cars, 14(3):509-516, 2019. [doi]

2017

Evaluating Spatial Coverage of Breast Examination with Free-hand Ultrasound TransducerZuzana Bílková, Michal Bartos, Jan Schier, Filip Sroubek, Barbara Zitová, Jan Vydra, Jan Danes. biostec 2017: 128-133 [doi]

2012

Automated Detection of Interphase and Metaphase Nuclei in the FISH ImagesJan Schier, Bohumil Kovár, Eduard Kocárek. biostec 2012: 347-350

2011

Automated Counting of Yeast Colonies using the Fast Radial Transform AlgorithmJan Schier, Bohumil Kovár. biostec 2011: 22-27

Image Processing for Automated Analysis of the Fluorescence In-Situ Hybridization (FISH) Microscopic ImagesJan Schier, Bohumil Kovár, Eduard Kocárek, Michal Kunes. ichit 2011: 622-633 [doi]

Simple Tool for Semi-automated Evaluation of Yeast Colony ImagesJan Schier, Bohumil Kovár. biostec 2013: 110-125 [doi]

2010

GSFAP adaptive filtering using log arithmetic for resource-constrained embedded systemsMilan TichÃ½, Jan Schier, David Gregg. tecs, 9(3), 2010. [doi]

2007

Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design - Implementation of Finite Interval Constant Modulus AlgorithmPremysl Sucha, Zdenek Hanzálek, Antonin Hermanek, Jan Schier. vlsisp, 46(1):35-53, 2007. [doi]

2006

2004

Architecture design for FPGA implementation of finite interval CMAAntonin Hermanek, Jan Schier, Phillip A. Regalia. eusipco 2004: 2039-2042 [doi]

Using Logarithmic Arithmetic to Implement the Recursive Least Squares (QR) Algorithm in FPGAJan Schier, Antonin Hermanek. fpl 2004: 1149-1151 [doi]

2003

MATLAB/Simulink Based Methodology for Rapid-FPGA-PrototypingMiroslav Lícko, Jan Schier, Milan Tichý, Markus Kühl. fpl 2003: 984-987 [doi]

Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-PrototypingZdenek Pohl, Jan Schier, Miroslav Lícko, Antonin Hermanek, Milan Tichý, Rudolf Matousek, Jiri Kadlec. ipps 2003: 190 [doi]

1996

Inverse updated systolic RLS algorithm with regularized exponential forgettingJan Schier. kybernetika, 32(3):209-234, 1996. [doi]

Sign in or sign up to see more results.

runs on WebDSL