Kuan Jen Lin - researchr alias

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Viewing Publication 1 - 24 from 24

2022

Hardware Accelerator for Symmetric Permutation-Diffusion Image EncryptionKuan Jen Lin, Ya Jheng Lin. gcce 2022: 127-128 [doi]

2019

2018

An FPGA Implementation of Lossless ECG Compressors Based on Multi-Stage Huffman CodingKuan Jen Lin, Hsin-Han Huang, Yen-Yu Lin. gcce 2018: 132-133 [doi]

ECG Data Encryption Then Compression Using Singular Value DecompositionTing-Yu Liu, Kuan Jen Lin, Hsi Chun Wu. titb, 22(3):707-713, 2018. [doi]

2016

A low cost fleet management system with real time video surveillance using peer-to-peer connectionMing Te Hsu, Kuan Jen Lin. gcce 2016: 1-2 [doi]

2015

Assessing and counteracting the effects of interference on GNSS signalsYu Tsai Chen, Kuan Jen Lin. gcce 2015: 427-428 [doi]

2013

Implementation of trigonometric custom functions hardware on embedded processorKuan Jen Lin, Chien Chih Hou. gcce 2013: 155-157 [doi]

2012

Using TPM to improve boot security at BIOS layerKuan Jen Lin, Chin-Yi Wang. iccel 2012: 376-377 [doi]

A parallel decimal adder with carry correction during binary accumulationKuan Jen Lin, Ju Lin Shih, Tsz Hao Lin, Yu-mei Wang. newcas 2012: 101-104 [doi]

2011

Enhance hardware security using FIFO in pipelinesKuan Jen Lin, Chih Ping Weng, Tsai Kun Hou. IEEEias 2011: 344-349 [doi]

2010

A decimal squarer with efficient partial product generationKuan Jen Lin, Yu Chan Chiu, Tzu-Hao Lin. vlsi 2010: 213-218 [doi]

2009

Design Optimization and Automation for Secure Cryptographic CircuitsKuan Jen Lin, Yi Tang Chiu, Shan Chien Fang. vlsid 2009: 321-326 [doi]

2007

Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardwareKuan Jen Lin, Shan Chien Fang, Shih Hsien Yang, Cheng Chia Lo. date 2007: 1265-1270 [doi]

Optimal Allocation of I/O Device Parameters in Hardware and Software Codesign MethodologyKuan Jen Lin, Shih Hao Huang, Shih Wen Chen. euc 2007: 541-552 [doi]

2006

Design and Implementation of a Schedulable DMAC on an AMBA-Based SOPC PlatformKuan Jen Lin, Chuang Hsiang Huang, Cheng Chia Lo. apccas 2006: 279-282 [doi]

Cooptimization of interface hardware and software for I/O controllersKuan Jen Lin, Shih Hao Huang, Shan Chien Fang. date 2006: 724-725 [doi]

2005

A hardware/software codesign approach for programmable IO devicesKuan Jen Lin, Shih Hao Huang, Shih Wen Chen. glvlsi 2005: 323-327 [doi]

2004

On the formulation of software cost for IO devicesKuan Jen Lin, Shih Wen Chen. iastedSEA 2004: 761-766

1997

Synthesis of Hazard-Free Asynchronous Circuits Based on Characteristic GraphKuan Jen Lin, Chi-Wen Kuo, Chen-Shang Lin. TC, 46(11):1246-1263, 1997.

1994

Direct Synthesis of Hazard-Free Asynchronous Circuits from STGs Based on Lock Relation and BG-Decomposition ApproachKuan Jen Lin, Jih-Wen Kuo, Chen-Shang Lin. eurodac 1994: 178-183

1992

On the verification of state-coding in STGsKuan Jen Lin, Chen-Shang Lin. iccad 1992: 118-122 [doi]

1991

Automatic Synthesis of Asynchronous CircuitsKuan Jen Lin, Chen-Shang Lin. dac 1991: 296-301 [doi]

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