Rajeevan Chandel - researchr alias

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Viewing Publication 1 - 22 from 22

2022

Improving the Flare Perturbation Response of Gasket Monopole Antenna for Custom Frequency SolutionsDeepanshu Kaushal, Rajeevan Chandel. ifip5-5 2022: 158-163 [doi]

Proposal and analysis of carbon nanotube based differential multibit through glass viasAjay Kumar, Rajeevan Chandel, Rohit Dhiman. mj, 126:105500, 2022. [doi]

2021

2018

A Unified Delay, Power and Crosstalk Model for Current Mode Signaling Multiwall Carbon Nanotube InterconnectsYash Agrawal, Girish Kumar Mekala, Rajeevan Chandel. cssp, 37(4):1359-1382, 2018. [doi]

2017

Modelling and performance analysis of dielectric inserted side contact multilayer graphene nanoribbon interconnectsGirish Kumar Mekala, Yash Agrawal, Rajeevan Chandel. iet-cds, 11(3):232-240, 2017. [doi]

Stability analysis of SRAM cell using CNT and GNR field effect transistorsParmjit Singh, Rajeevan Chandel, Neha Sharma. ic3 2017: 1-6 [doi]

2016

Performance Analysis of Top-Contact MLGNR Based InterconnectsRamesh Kumar, Rohit Dhiman, Rajeevan Chandel. ifip5-5 2016: 11-16 [doi]

Design of Low-Power High-Gain Operational Amplifier for Bio-Medical ApplicationsSanjay Singh Rajput, Ashish Singh, Ashwani Kumar Chandel, Rajeevan Chandel. isvlsi 2016: 355-360 [doi]

2015

Performance Analysis of Multilayer Graphene Nano-Ribbon in Current-Mode Signaling Interconnect SystemYash Agrawal, Rajeevan Chandel, Girish Kumar Mekala. ifip5-5 2015: 297-302 [doi]

Dynamic Crosstalk Analysis in Coupled Interconnects for Ultra-Low Power ApplicationsRohit Dhiman, Rajeevan Chandel. cssp, 34(1):21-40, 2015. [doi]

Timing and Stability Analysis of Carbon Nanotube InterconnectsGirish Kumar Mekala, Rajeevan Chandel, Yash Agrawal. ifip5-5 2015: 308-313 [doi]

2012

Sub-Threshold Delay and Power Analysis of Complementary Metal-Oxide Semiconductor Buffer Driven Interconnect Load for Ultra Low Power ApplicationsRohit Dhiman, Rajeevan Chandel. jolpe, 8(1):39-46, 2012. [doi]

Netlist bipartitioning using particle swarm optimisation techniqueSandeep Singh Gill, Rajeevan Chandel, Ashwani Kumar Chandel. ijaisc, 3(1):1-15, 2012. [doi]

2011

Resistive analysis of mixed carbon nanotube bundle interconnect and its comparison with copper interconnectT. Alam, Rohit Dhiman, Rajeevan Chandel. icwet 2011: 1157-1160 [doi]

2010

Design and Analysis of a Modified Low Power CMOS Full Adder Using Gate-Diffusion Input TechniqueKiran K. Chaddha, Rajeevan Chandel. jolpe, 6(4):482-490, 2010. [doi]

Impact of skew and jitter on the performance of VLSI interconnectsGargi Khanna, Rajeevan Chandel, Ashwani Kumar Chandel. apccas 2010: 1223-1226 [doi]

Design and Analysis of Sub-DT Sub-Domino Logic Circuits for Ultra Low Power ApplicationsAshutosh Nandi, Rajeevan Chandel. jolpe, 6(4):513-520, 2010. [doi]

2007

An analysis of interconnect delay minimization by low-voltage repeater insertionRajeevan Chandel, Sankar Sarkar, R. P. Agarwal. mj, 38(4-5):649-655, 2007. [doi]

Investigations on Short-Circuit Power Dissipation in Repeater Loaded VLSI InterconnectsRajeevan Chandel, Sankar Sarkar, Ashwani Chandel. jolpe, 3(3):337-344, 2007. [doi]

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