Rajesh Radhakrishnan - researchr alias

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Viewing Publication 1 - 18 from 18

2015

2014

Political engineering: optimizing a U.S. Presidential candidate's platformJames J. Cochran, David J. Curry, Rajesh Radhakrishnan, Jon Pinnell. anor, 215(1):63-87, 2014. [doi]

2013

2012

2011

2010

2009

2003

A Fast Macro Based Compilation Methodology for Partially Reconfigurable FPGA DesignsManish Handa, Rajesh Radhakrishnan, Madhubanti Mukherjee, Ranga Vemuri. vlsid 2003: 91 [doi]

2002

Framework for Synthesis of Virtual PipelinesSrinivasan Dasasathyan, Rajesh Radhakrishnan, Ranga Vemuri. vlsid 2002: 326-331 [doi]

A novel MAC layer protocol for space division multiple access in wireless ad hoc networksDhananjay Lal, Rishi Toshniwal, Rajesh Radhakrishnan, Dharma P. Agrawal, James Caffery Jr.. icccn 2002: 614-619 [doi]

2001

Theorem Proving Guided Development of Formal Assertions in a Resource-Constrained Scheduler for High-Level SynthesisNaren Narasimhan, Elena Teica, Rajesh Radhakrishnan, Sriram Govindarajan, Ranga Vemuri. fmsd, 19(3):237-273, 2001.

Verification of Basic Block Schedules Using RTL TransformationsRajesh Radhakrishnan, Elena Teica, Ranga Vemuri. charme 2001: 173-178 [doi]

On the verification of synthesized designs using automatically generated transformational witnessesElena Teica, Rajesh Radhakrishnan, Ranga Vemuri. date 2001: 798 [doi]

2000

An approach to high-level synthesis system validation using formally verified transformationsRajesh Radhakrishnan, Elena Teica, Ranga Vemuri. hldvt 2000: 80-85 [doi]

1998

Theorem proving guided development of formal assertions in a resource-constrained scheduler for high-level synthesisNaren Narasimhan, Elena Teica, Rajesh Radhakrishnan, Sriram Govindarajan, Ranga Vemuri. In ICCD. 1998: 392-399 [doi]

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