Shigeru Atsumi - researchr alias

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Viewing Publication 1 - 11 from 11

2002

2001

Wordline voltage generating system for low-power low-voltage flash memoriesToru Tanzawa, Akira Umezawa, Masao Kuriyama, Tadayuki Taura, Hironori Banba, Takeshi Miyaba, Hitoshi Shiga, Yoshinori Takano, Shigeru Atsumi. jssc, 36(1):55-63, 2001. [doi]

2000

1999

A CMOS bandgap reference circuit with sub-1-V operationHironori Banba, Hitoshi Shiga, Akira Umezawa, Takeshi Miyaba, Toru Tanzawa, Shigeru Atsumi, Koji Sakui. jssc, 34(5):670-674, 1999. [doi]

Optimization of word-line booster circuits for low-voltage flash memoriesToru Tanzawa, Shigeru Atsumi. jssc, 34(8):1091-1098, 1999. [doi]

1994

A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operationShigeru Atsumi, Masao Kuriyama, Akira Umezawa, Hironori Banba, Kiyomi Naruke, Seiji Yamada, Yoichi Ohshima, Masamitsu Oshikiri, Yohei Hiura, Tomoko Yamane, Kuniyoshi Yoshikawa. jssc, 29(4):461-469, April 1994. [doi]

1992

A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structureAkira Umezawa, Shigeru Atsumi, Masao Kuriyama, Hironori Banba, Ken-ichi Imamiya, Kiyomi Naruke, Seiji Yamada, Etsushi Obi, Masamitsu Oshikiri, Tomoko Suzuki, Sumio Tanaka. jssc, 27(11):1540-1546, November 1992. [doi]

1990

A 68-ns 4-Mbit CMOS EPROM with high-noise-immunity designKenichi Imamiya, Jun-ichi Miyamoto, Shigeru Atsumi, Nobuaki Ohtsuka, Yukinori Muroya, Toshiyuki Sako, Masao Higashino, Yumiko Iyama, Seiichi Mori, Yoichi Ohshima, Hitoshi Araki, Yukio Kaneko, Kazuhito Narita, Norihisa Arai, Kuniyoshi Yoshikawa, Shinichi Tanaka. jssc, 25(1):72-78, February 1990. [doi]

A 16-ns 1-Mb CMOS EPROMMasao Kuriyama, Shigeru Atsumi, Ken-ichi Imamiya, Yumiko Iyama, Naohiro Matsukawa, Hitoshi Araki, Kazuhito Narita, Kazunori Masuda, Sumio Tanaka. jssc, 25(5):1141-1146, October 1990. [doi]

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