Sung Soo Chung - researchr alias

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Viewing Publication 1 - 6 from 6

2005

Analytical test buffer design for differential signaling I/O buffers by error syndrome analysisSanghyeon Baeg, Sung Soo Chung. tvlsi, 13(3):370-383, 2005. [doi]

2004

Removing JTAG Bottlenecks in System Interconnect TestHong Shin Jun, Sung Soo Chung, Sang H. Baeg. itc 2003: 173-180 [doi]

At-Speed Interconnect Test and Diagnosis of External Memories on a SystemHeon C. Kim, Hong Shin Jun, Xinli Gu, Sung Soo Chung. itc 2003: 156-162 [doi]

2002

Re-Using DFT Logic for Functional and Silicon Debugging TestXinli Gu, Weili Wang, Kevin Li, Heon C. Kim, Sung Soo Chung. itc 2002: 648-656 [doi]

2001

AC-JTAG: empowering JTAG beyond testing DC netsSung Soo Chung, Sanghyeon Baeg. itc 2001: 30-37

An effort-minimized logic BIST implementation methodXinli Gu, Sung Soo Chung, Frank Tsang, Jan Arild Tofte, Hamid Rahmanian. itc 2001: 1002-1010

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