Usha Mehta - researchr alias

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Viewing Publication 1 - 9 from 9

2023

Efficient Implementation of Decimal to BCD Encoder using Modified-GDI TechniqueDivya Soni, Usha Mehta. ifip5-5 2023: 373-376 [doi]

2021

Transition Probability-Based Detection of Hardware Trojan in Digital CircuitsUsha Mehta, Jayesh Popat. icict 2022: 619-627 [doi]

2019

A Simple Synthesis Process for Combinational QCA Circuits: QSynthesizerVaishali Dhare, Usha Mehta. vlsid 2019: 498-499 [doi]

Test Pattern Generator for Majority Voter based QCA Combinational Circuits targeting MMC DefectVaishali Dhare, Usha Mehta. ets 2019: 1-2 [doi]

Statistical security analysis of AES with X-tolerant response compactor against all types of test infrastructure attacks with/without novel unified countermeasureJayesh Popat, Usha Mehta. iet-cds, 13(8):1117-1124, 2019. [doi]

2018

A Novel Countermeasure Against Differential Scan Attack in AES AlgorithmJayesh Popat, Usha Mehta. vdat 2019: 297-309 [doi]

2016

Guest EditorialMark Zwolinski, Manoj Singh Gaur, Vijay Laxmi, Usha Mehta. iet-cdt, 10(5):203-204, 2016. [doi]

2015

Defect characterization and testing of QCA devices and circuits: A surveyVaishali Dhare, Usha Mehta. vdat 2015: 1-2 [doi]

A Hamming code based technique to resolve the bit flip impact on compressed VLSI test data in IP core based SoCHarikrishna Parmar, Usha Mehta. vdat 2015: 1-6 [doi]

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