Waleed El-Halwagy - researchr alias

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Viewing Publication 1 - 7 from 7

2018

A 100-MS/s-5-GS/s, 13-5-bit Nyquist-Rate Reconfigurable Time-Domain ADCWaleed El-Halwagy, Pedram Mousavi, Masum Hossain. tvlsi, 26(10):1967-1979, 2018. [doi]

Investigation of Wideband Substrate-Integrated Vertically-Polarized Electric Dipole Antenna and Arrays for mm-Wave 5G Mobile DevicesWaleed El-Halwagy, Rashid Mirzavand, Jordan Melzer, Masum Hossain, Pedram Mousavi. access, 6:2145-2157, 2018. [doi]

2017

Fractional-N DPLL-Based Low-Power Clocking Architecture for 1-14 Gb/s Multi-Standard TransmitterMasum Hossain, Waleed El-Halwagy, A. K. M. Delwar Hossain, Aurangozeb. jssc, 52(10):2647-2662, 2017. [doi]

2016

A 79dB SNDR, 10MHz BW, 675MS/s open-loop time-based ADC employing a 1.15ps SAR-TDCWaleed El-Halwagy, P. Mousavi, Masum Hossain. asscc 2016: 321-324 [doi]

Fractional-N DPLL based low power clocking architecture for 1-14 Gb/s multi-standard transmitterMasum Hossain, Amlan Nag, Waleed El-Halwagy, A. K. M. Delwar Hossain, Aurangozeb. asscc 2016: 89-92 [doi]

2013

Analysis and design of analog-based voltage controlled oscillator linearization techniqueWaleed El-Halwagy, Mohammed Dessouky, Hassan El-Ghitani. idt 2013: 1-6 [doi]

A programmable 8-bit, 10MHz BW, 6.8mW, 200MSample/sec, 70dB SNDR VCO-based ADC using SC feedback for VCO linearizationWaleed El-Halwagy, Mohamed Dessouky, Hassan El-Ghitani. icecsys 2013: 157-160 [doi]

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