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2020

International Conference on Field-Programmable Technology, (IC)FPT 2020, Maui, HI, USA, December 9-11, 2020IEEE, 2020. [doi]

Hardware Implementations with High Throughput, Low-Latency and Low-Area for Matrix InversionSultan Alqahtani, Yiqun Zhu, Qizhi Shi, Xiaolin Meng, Xinhua Wang. icfpt 2020: 250-255 [doi]

StateReveal: Enabling Checkpointing of FPGA Designs with Buried StateSameh Attia, Vaughn Betz. icfpt 2020: 206-214 [doi]

New Directions for NewHope: Improving Performance of Post-Quantum Cryptography through Algorithm-level PipeliningLuke Beckwith, William Diehl. icfpt 2020: 120-128 [doi]

Beyond Peak Performance: Comparing the Real Performance of AI-Optimized FPGAs and GPUsAndrew Boutros, Eriko Nurvitadhi, Rui Ma, Sergey Gribok, Zhipeng Zhao, James C. Hoe, Vaughn Betz, Martin Langhammer. icfpt 2020: 10-19 [doi]

Neighbors From Hell: Voltage Attacks Against Deep Learning Accelerators on Multi-Tenant FPGAsAndrew Boutros, Mathew Hall, Nicolas Papernot, Vaughn Betz. icfpt 2020: 103-111 [doi]

Build Automation and Runtime Abstraction for Partial Reconfiguration on Xilinx Zynq UltraScale+Alex R. Bucknall, Shanker Shreejith, Suhaib A. Fahmy. icfpt 2020: 215-220 [doi]

A Design Exploration of Scalable Mesh-based Fully Pipelined AcceleratorsWesterley Carvalho, Michael Canesche, Lucas Reis, Frank Sill Torres, Lucas B. da Silva, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira. icfpt 2020: 233-236 [doi]

A Bucket-Stream rBRIEF Extraction Architecture for SLAM Applications on Embedded PlatformsHaowen Chen, Feiteng Li, Zhuo Zhang. icfpt 2020: 277-280 [doi]

A Complete Open Source Design Flow for Gowin FPGAsPepijn de Vos, Michael Kirchhoff, Daniel Ziener. icfpt 2020: 182-189 [doi]

Learn to Place: FPGA Placement Using Reinforcement Learning and Directed MovesMohamed A. Elgammal, Kevin E. Murray, Vaughn Betz. icfpt 2020: 85-93 [doi]

INFER: INterFerence-aware Estimation of Runtime for Concurrent CNN Execution on DPUsShikha Goel, Rajesh Kedia, M. Balakrishnan, Rijurekha Sen. icfpt 2020: 66-71 [doi]

Quantisation-aware Dimensionality ReductionCe Guo, Wayne Luk. icfpt 2020: 237-240 [doi]

A Reconfigurable Compute-in-the-Network FPGA Assistant for High-Level Collective Support with Distributed Matrix Multiply Case StudyPouya Haghi, Anqi Guo, Tong Geng, Justin T. Broaddus, Derek Schafer, Anthony Skjellum, Martin C. Herbordt. icfpt 2020: 159-164 [doi]

From TensorFlow Graphs to LUTs and Wires: Automated Sparse and Physically Aware CNN Hardware GenerationMathew Hall, Vaughn Betz. icfpt 2020: 56-65 [doi]

Revisiting FPGA Routing under Varying Operating ConditionsBehnam Khaleghi, Sahand Salamat, Tajana Simunic Rosing. icfpt 2020: 94-102 [doi]

How Much Does Regularity Help FPGA Placement?Hongxin Kong, Lang Feng, Chunhua Deng, Bo Yuan 0001, Jiang Hu. icfpt 2020: 76-84 [doi]

Ultra-Low-Latency Video Encoding on Heterogenous Hardware PlatformsMartin Koppehel, Thilo Pionteck. icfpt 2020: 287 [doi]

Performance Exploration on Pre-implemented CNN Hardware Accelerator on FPGADanielle Tchuinkou Kwadjo, Joel Mandebi Mbongue, Christophe Bobda. icfpt 2020: 298-299 [doi]

Automated Integration of High-Level Synthesis FPGA Modules with ROS2 SystemsDaniel Pinheiro Leal, Midori Sugaya, Hideharu Amano, Takeshi Ohkawa. icfpt 2020: 292-293 [doi]

Jitter-based Adaptive True Random Number Generation for FPGAs in the CloudXiang Li, Peter Stanwicks, George Provelengios, Russell Tessier, Daniel E. Holcomb. icfpt 2020: 112-119 [doi]

A Low-Cost Reconfigurable Nonlinear Core for Embedded DNN ApplicationsYue Li, Wei Cao 0002, Xuegong Zhou, Lingli Wang. icfpt 2020: 35-38 [doi]

ReconROS: Flexible Hardware Acceleration for ROS2 ApplicationsChristian Lienen, Marco Platzner, Bernhard Rinner. icfpt 2020: 268-276 [doi]

An FPGA-Based Upper-Limb Rehabilitation Device for Gesture Recognition and Motion Evaluation Using Multi-Task Recurrent Neural NetworksHaoyan Liu, Atiyehsadat Panahi, David Andrews, Alexander Nelson. icfpt 2020: 296-297 [doi]

Optimizing Fully Spectral Convolutional Neural Networks on FPGAShuanglong Liu, Wayne Luk. icfpt 2020: 39-47 [doi]

CHIP-KNN: A Configurable and High-Performance K-Nearest Neighbors Accelerator on Cloud FPGAsAlec Lu, Zhenman Fang, Nazanin Farahpour, Lesley Shannon. icfpt 2020: 139-147 [doi]

High Throughput and Low Latency Multi-Version Management Key-Value Storage AcceleratorHankun Lv, Yuchen Ren, Yunhui Qiu, Wenbo Yin, Lingli Wang. icfpt 2020: 290-291 [doi]

Nonintrusive and Adaptive Monitoring for Locating Voltage Attacks in Virtualized FPGAsSeyedeh Sharareh Mirzargar, Gaiëtan Renault, Andrea Guerrieri, Mirjana Stojilovic. icfpt 2020: 288-289 [doi]

Acceleration of Short Read Alignment with Runtime ReconfigurationHo-Cheung Ng, Shuanglong Liu, Izaak Coleman, Ringo S. W. Chu, Man-Chung Yue, Wayne Luk. icfpt 2020: 256-262 [doi]

FlexBex: A RISC-V with a Reconfigurable Instruction ExtensionNguyen-Dao, Andrew Attwood, Bea Healy, Dirk Koch. icfpt 2020: 190-195 [doi]

An FPGA Accelerator for Bayesian Network Structure Learning with Iterative Use of Processing ElementsYasuhiro Nitta, Hideki Takase. icfpt 2020: 29-34 [doi]

Battling the CPU Bottleneck in Apache Parquet to Arrow Conversion Using FPGAJohan Peltenburg, Lars T. J. van Leeuwen, Joost Hoozemans, Jian Fang 0004, Zaid Al-Ars, H. Peter Hofstee. icfpt 2020: 281-286 [doi]

Memory-Efficient Dataflow Inference for Deep CNNs on FPGALucian Petrica, Tobias Alonso, Mairin Kroes, Nicholas J. Fraser, Sorin Cotofana, Michaela Blott. icfpt 2020: 48-55 [doi]

Designing Universal Logic Module FPGA Architectures for Use With Ambipolar Transistor TechnologyJohannes Pfau, Maximilian Reuter, Klaus Hofmann, Jürgen Becker 0001. icfpt 2020: 165-173 [doi]

Moving Compute towards Data in Heterogeneous multi-FPGA Clusters using Partial Reconfiguration and I/O VirtualisationKhoa Dang Pham, Dirk Koch, Anuj Vaishnav, Konstantinos Georgopoulos, Pavlos Malakonakis, Aggelos Ioannou, Iakovos Mavroidis. icfpt 2020: 221-226 [doi]

Towards Overlay-based Rapid In-Circuit Tuning of Deep Learning DesignsZhiqiang Que, Daniel Holanda Noronha, Ruizhe Zhao, Xinyu Niu, Steven J. E. Wilton, Wayne Luk. icfpt 2020: 301 [doi]

A Reconfigurable Multithreaded Accelerator for Recurrent Neural NetworksZhiqiang Que, Hiroki Nakahara, Hongxiang Fan, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Eriko Nurvitadhi, Wayne Luk. icfpt 2020: 20-28 [doi]

Mapping Multiple LSTM models on FPGAsStefano Ribes, Pedro Trancoso, Ioannis Sourdis, Christos-Savvas Bouganis. icfpt 2020: 1-9 [doi]

Automatic Selection and Insertion of HLS Directives Via a Source-to-Source CompilerTiago Santos, João M. P. Cardoso. icfpt 2020: 227-232 [doi]

DASH: Design Automation for Synthesis and Hardware Generation for CNNArish Sateesan, Sharad Sinha, Smitha K. G.. icfpt 2020: 72-75 [doi]

A High-Throughput, Resource-Efficient Implementation of the RoCEv2 Remote DMA Protocol for Network-Attached Hardware AcceleratorsNiklas Schelten, Fritjof Steinert, Anton Schulte, Benno Stabernack. icfpt 2020: 241-249 [doi]

GIB: A Novel Unidirectional Interconnection Architecture for FPGAKaichuang Shi, Hao Zhou, Xuegong Zhou, Lingli Wang. icfpt 2020: 174-181 [doi]

Design Method for an LUT Network-Based CNN with a Sparse Local ConvolutionNaoto Soga, Hiroki Nakahara. icfpt 2020: 294-295 [doi]

Bandwidth Efficient Near-Storage Accelerator for High-Dimensional Similarity SearchGongjin Sun, Sang-Woo Jun. icfpt 2020: 129-138 [doi]

Cloud FPGA Security with RO-Based PrimitivesShanquan Tian, Andrew Krzywosz, Ilias Giechaskiel, Jakub Szefer. icfpt 2020: 154-158 [doi]

Exploring performance enhancement of event-driven processor networksTim Todman, David B. Thomas, Wayne Luk. icfpt 2020: 300 [doi]

Fast Linking of Separately-Compiled FPGA Blocks without a NoCYuanlong Xiao, Syed Tousif Ahmed, André DeHon. icfpt 2020: 196-205 [doi]

A High Throughput Parallel Hash Table Accelerator on HBM-enabled FPGAsYang Yang, Sanmukh R. Kuppannagari, Viktor K. Prasanna. icfpt 2020: 148-153 [doi]

Service Chaining for Heterogeneous MiddleboxesXuzhi Zhang, Russell Tessier. icfpt 2020: 263-267 [doi]

2019

International Conference on Field-Programmable Technology, ICFPT 2019, Tianjin, China, December 9-13, 2019IEEE, 2019. [doi]

Revisiting Deep Learning Parallelism: Fine-Grained Inference Engine Utilizing Online ArithmeticAmeer M. S. Abdelhadi, Lesley Shannon. icfpt 2019: 383-386 [doi]

Towards the Improvement of Training Efficiency and Image Recognition Accuracy for an FPGA Controlled Mini-Car by Offloading Neural Network TrainingMusashi Aoto, Moe Mitsugi, Takumi Momose, Yasutaka Wada. icfpt 2019: 437-440 [doi]

Optimizing FPGA-Based Streaming Applications for Throughput Using PipeliningAli Asghar, Rick van Loo, Timon Kruiper, Daniel Ziener. icfpt 2019: 351-354 [doi]

Synchronizing On-Chip Software and Hardware Traces for HLS-Accelerated ProgramsMatthew B. Ashcraft, Jeffrey Goeders. icfpt 2019: 54-62 [doi]

Network Enabled Partial Reconfiguration for Distributed FPGA Edge AccelerationAlex R. Bucknall, Shanker Shreejith, Suhaib A. Fahmy. icfpt 2019: 259-262 [doi]

Partitioning FPGA-Optimized Systolic Arrays for Fun and ProfitLong Chung Chan, Gurshaant Malik, Nachiket Kapre. icfpt 2019: 144-152 [doi]

High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for FPGAs with Registered RoutingYu-Ting Chen, Jin-Hee Kim, Kexin Li, Graham Hoyes, Jason H. Anderson. icfpt 2019: 375-378 [doi]

In Search of Lost Bandwidth: Extensive Reordering of DRAM Accesses on FPGAGabor Csordas, Mikhail Asiatici, Paolo Ienne. icfpt 2019: 188-196 [doi]

Implementing and Benchmarking Three Lattice-Based Post-Quantum Cryptography Algorithms Using Software/Hardware CodesignViet B. Dang, Farnoud Farahmand, Michal Andrzejczak, Kris Gaj. icfpt 2019: 206-214 [doi]

Exploring Resource-Efficient Acceleration Algorithm for Transposed Convolution of GANs on FPGAXinkai Di, Haigang Yang, Zhihong Huang, Ning Mao, Yiping Jia, Yong Zheng. icfpt 2019: 19-27 [doi]

Training Deep Neural Networks in Low-Precision with High Accuracy Using FPGAsSean Fox, Julian Faraone, David Boland, Kees A. Vissers, Philip H. W. Leong. icfpt 2019: 1-9 [doi]

ASAP: Automatic Sizing and Partitioning for Dynamic Memory Heaps in High-Level SynthesisNicholas V. Giamblanco, Jason Helge Anderson. icfpt 2019: 275-278 [doi]

FPGA-Based Object Detection for Autonomous Driving SystemKenichi Harada, Kenji Kanazawa, Moritoshi Yasunaga. icfpt 2019: 465-468 [doi]

A Coarse-Grained Reconfigurable Architecture with a Fault Tolerant Non-Volatile Configurable MemoryTakeharu Ikezoe, Takuya Kojima, Hideharu Amano. icfpt 2019: 81-89 [doi]

Lightweight Programmable DSP Block Overlay for Streaming Neural Network AccelerationLenos Ioannou, Suhaib A. Fahmy. icfpt 2019: 355-358 [doi]

Autonomous Driving Developed with an FPGA DesignEuan Jones, Keegan Pepper, Aimei Li, Shiyue Li, Yuteng Zhang, Donald Bailey. icfpt 2019: 431-434 [doi]

Real-Time Object Detection on 640x480 Image With VGG16+SSDHyeong-Ju Kang. icfpt 2019: 419-422 [doi]

Design and Implementation of Autonomous Driving Robot Car Using SoC FPGAAkira Kojima, Yuya Osawa. icfpt 2019: 441-444 [doi]

An SoC-FPGA-Based Micro UGV with Localization and Motion PlanningYuya Kudo, Atsushi Takada, Yuta Ishida, Tomonori Izumi. icfpt 2019: 469-472 [doi]

SoC-FPGA-Based Implementation of Iris Recognition Enhanced by QC-LDPC CodesLongyu Ma, Chiu-Wing Sham. icfpt 2019: 391-394 [doi]

An Open-Source Lightweight Timing Model for RapidWrightPongstorn Maidee, Chris Neely, Alireza Kaviani, Chris Lavin. icfpt 2019: 171-178 [doi]

Unexpected Diversity: Quantitative Memory Analysis for Zynq UltraScale+ SystemsKristiyan Manev, Anuj Vaishnav, Dirk Koch. icfpt 2019: 179-187 [doi]

Automatic Generation of Application-Specific FPGA Overlays with RapidWrightJoel Mandebi Mbongue, Danielle Tchuinkou Kwadjo, Christophe Bobda. icfpt 2019: 303-306 [doi]

Optimisation of System Throughput Exploiting Tasks Heterogeneity on Space Shared FPGAsUmar Ibrahim Minhas, Roger F. Woods, Georgios Karakonstantis. icfpt 2019: 359-362 [doi]

A High-Level Synthesis Approach to the Software/Hardware Codesign of NTT-Based Post-Quantum Cryptography AlgorithmsDuc Tri Nguyen, Viet B. Dang, Kris Gaj. icfpt 2019: 371-374 [doi]

Amoeba-Inspired Hardware SAT Solver with Effective Feedback ControlAnh Hoang Ngoc Nguyen, Masashi Aono, Yuko Hara-Azumi. icfpt 2019: 243-246 [doi]

Design and Development of Networked Multiple FPGA Components for Autonomous Tiny Robot CarTakeshi Ohkawa, Shotaro Tayama, Hayato Mori, Dohyung Lee, Hayato Amano, Itsuki Hirakawa, Mikiko Sato, Harumi Watanabe. icfpt 2019: 473-475 [doi]

SkyCastle: A Resource-Aware Multi-Loop Scheduler for High-Level SynthesisJulian Oppermann, Lukas Sommer, Lukas Weber, Melanie Reuter-Oppermann, Andreas Koch 0001, Oliver Sinnen. icfpt 2019: 36-44 [doi]

Survey on FPGAs in Medical Radiology Applications: Challenges, Architectures and Programming ModelsDaniele Passaretti, Jan Moritz Joseph, Thilo Pionteck. icfpt 2019: 279-282 [doi]

Improving Memory Access Locality for Vectorized Bit-Serial Matrix Multiplication in Reconfigurable ComputingLahiru Rasnayake, Magnus Själander. icfpt 2019: 415-418 [doi]

AutoBoxing: Improving GCC Passes to Optimize HW/SW Multi-Versioning of Kernels for HLSJohanna Rohde, Christian Hochberger. icfpt 2019: 319-322 [doi]

A Dataflow Pipelining Architecture for Tile Segmentation with a Sparse MobileNet on an FPGAYouki Sada, Masayuki Shimoda, Akira Jinguji, Hiroki Nakahara. icfpt 2019: 267-270 [doi]

Pipelined Parallel Finite Automata EvaluationVipula Sateesh, Connor Mckeon, Jared Winograd, André DeHon. icfpt 2019: 108-116 [doi]

A Machine Learning Approach for Power Gating the FPGA Routing NetworkZeinab Seifoori, Hossein Asadi, Mirjana Stojilovic. icfpt 2019: 10-18 [doi]

Winograd-Based Real-Time Super-Resolution System on FPGABizhao Shi, Zhucheng Tang, Guojie Luo, Ming Jiang 0001. icfpt 2019: 423-426 [doi]

ZFP-V: Hardware-Optimized Lossy Floating Point CompressionGongjin Sun, Sang-Woo Jun. icfpt 2019: 117-125 [doi]

An OpenCL-Based Hybrid CNN-RNN Inference Accelerator On FPGAYunfei Sun, Brian Liu, Xianchao Xu. icfpt 2019: 283-286 [doi]

Efficient OS Hardware Accelerators Preemption Management in FPGAYe Tian, Jean-Christophe Prévotet, Fabienne Nouvel. icfpt 2019: 367-370 [doi]

Real-Time Automatic Modulation ClassificationStephen Tridgell, David Boland, Philip H. W. Leong, Siddhartha 0003. icfpt 2019: 299-302 [doi]

Storage Mirroring for Bare-Metal Malware Analysis on FPGA DevicesDan Cristian Turicu, Octavian Cret, Lucia Vacariu. icfpt 2019: 335-338 [doi]

Evolved Binary Neural Networks Through Harnessing FPGA CapabilitiesRaúl Valencia, Chiu-Wing Sham, Oliver Sinnen. icfpt 2019: 395-398 [doi]

ZyNet: Automating Deep Neural Network Implementation on Low-Cost Reconfigurable Edge Computing PlatformsKizheppatt Vipin. icfpt 2019: 323-326 [doi]

Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAsLukas Weber, Lukas Sommer, Julian Oppermann, Alejandro Molina 0001, Kristian Kersting, Andreas Koch 0001. icfpt 2019: 251-254 [doi]

An Iterative Technique for Runtime Efficient Hardware-Software PartitioningDeshya Wijesundera, Kisaru Liyanage, Alok Prakash, Thambipillai Srikanthan, Thilina Perera. icfpt 2019: 403-406 [doi]

Dependency-Aware Clustering for Variable-Grained Hardware-Software PartitioningDeshya Wijesundera, Nadeeshan Dissanayake, Alok Prakash, Thambipillai Srikanthan, Damith Anhettigama. icfpt 2019: 411-414 [doi]

High-Throughput and Low-Latency Distributed Management Proxy for Key-Value Store Over 100Gbps Ethernet on FPGAJinyu Xie, Yunhui Qiu, Wenbo Yin, Lingli Wang. icfpt 2019: 224-230 [doi]

A Complete CPU-FPGA Architecture for Protein Identification with Tandem Mass SpectrometryMoucheng Yang, Tao Chen 0005, Xuegong Zhou, Liang Zhao, Yunping Zhu, Lingli Wang. icfpt 2019: 295-298 [doi]

Image Processing and Vehicles - Using FPGA to Reduce Latency of Time Critical TasksAndrew Yeo, Damon Hill, Anzhen Huang, Xueao Liu, Guanchen Dong, Donald Bailey. icfpt 2019: 476-479 [doi]

A High Energy-Efficiency FPGA-Based LSTM Accelerator Architecture Design by Structured Pruning and Normalized Linear QuantizationYong Zheng, Haigang Yang, Zhihong Huang, Tianli Li, Yiping Jia. icfpt 2019: 271-274 [doi]

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