Journal: IEEE Design & Test of Computers

Volume 19, Issue 3

0 -- 0Andrew B. Kahng. Variability
1 -- 0. Enabling IP
5 -- 7. Guest Editor s Introduction: What is Infrastructure IP?
8 -- 13Teresa L. McLaurin, Souvik Ghosh. ETM10 Incorporates Hardware Segment of IEEE P1500
14 -- 23Jim Bordelon, Ben Tranchina, Vipin Madangarli, Mark Craig. A Strategy for Mixed-Signal Yield Improvement
24 -- 36Sassan Tabatabaei, André Ivanov. Embedded Timing Analysis: A SoC Infrastructure
37 -- 45Bart Vermeulen, Sandeep Kumar Goel. Design for Debug: Catching Design Errors in Digital Chips
46 -- 55Stephen Pateras. IP for Embedded Diagnosis
56 -- 70Eric Dupont, Michael Nicolaidis, Peter Rohr. Embedded Robustness IPs for Transient-Error-Free ICs
72 -- 81Andrew E. Caldwell, Igor L. Markov. Toward CAD-IP Reuse: A Web Bookshelf of Fundamental Algorithms
82 -- 92Patrick Girard. Survey of Low-Power Testing of VLSI Circuits
94 -- 105Alfredo Benso, Silvia Chiusano, Paolo Prinetto. DFT and BIST of a Multichip Module for High-Energy Physics Experiments
106 -- 113. Design and Test Education in Latin America
114 -- 115Peter J. Ashenden. What Makes a Good Standard?
116 -- 0Adam Osseiran. Conference Reports
117 -- 0. DATC Newsletter
118 -- 119. TTTC Newsletter