Journal: IEEE Design & Test of Computers

Volume 6, Issue 5

8 -- 19Sudipta Bhawmik, P. Palchaudhuri. DFT Expert: designing testable VLSI circuits
20 -- 28Y. S. Kuo, S. Y. Hwang, H. F. Hu. A data structure for fast region searches
29 -- 39Young-Uk Yu. VLSI design and CAD technology in Korea
40 -- 49Shigeru Takasaki, Fumiyasu Hirose, Akihiko Yamada. Logic simulation engines in Japan
50 -- 57Alok Kumar, Vijeta Kashyap, Sunil D. Sherlekar, G. Venkatesh 0001, S. Biswas, Anshul Kumar, P. C. P. Bhatt, Sashi Kumar. Ideas: a tool for VLSI CAD
58 -- 77Sheldon B. Akers Jr., Balakrishnan Krishnamurthy. Test counting: a tool for VLSI testing