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| 5 | -- | 6 | An Chen, Vivek De, Xiaobo Sharon Hu, Michael T. Niemier. Guest Editors' Introduction: Special Issue on Architecture Advances Enabled by Emerging Technologies |
| 7 | -- | 14 | Pentti Kanerva. Computing with High-Dimensional Vectors |
| 15 | -- | 21 | Orchi Hassan, Kerem Yunus Camsari, Supriyo Datta. Voltage-Driven Building Block for Hardware Belief Networks |
| 22 | -- | 30 | Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja. Spin-Based Reconfigurable Logic for Power- and Area-Efficient Applications |
| 31 | -- | 38 | Pai-Yu Chen, Shimeng Yu. Technological Benchmark of Analog Synaptic Devices for Neuroinspired Architectures |
| 39 | -- | 45 | Xueqing Li, Juejian Wu, Kai Ni 0004, Sumitha George, Kaisheng Ma, John Sampson, Sumeet Kumar Gupta, Yongpan Liu, Huazhong Yang, Suman Datta, Vijaykrishnan Narayanan. Design of 2T/Cell and 3T/Cell Nonvolatile Memories with Emerging Ferroelectric FETs |
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| 95 | -- | 116 | Emanuele Valea, Mathieu Da Silva, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre. A Survey on Security Threats and Countermeasures in IEEE Test Standards |
| 117 | -- | 125 | Jae-woong Jeong, Jennifer Kitchen, Sule Ozev. On-Chip RF Phased Array Characterization with DC-Only Measurements for In-Field Calibration |
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| 128 | -- | 0 | Scott Davidson. The Last Byte: System Testing Ourselves |