Journal: IEEE Micro

Volume 19, Issue 6

15 -- 19Ken Sakamura. Entertainment and Edutainment
20 -- 28Masaaki Oka, Masakazu Suzuoki. Designing and programming the emotion engine
29 -- 35Shiro Hagiwara, Ian Oliver. Sega Dreamcast: creating a unified entertainment world
36 -- 42Ichiya Nakamura, Hideki Mori. Play and learning in the digital future
44 -- 52Davin S. L. Ing. Innovations in a technology museum
53 -- 63Xiao-Tao Chen, Wenyi Feng, Jun Zhao 0005, Fred J. Meyer, Fabrizio Lombardi. Reconfiguring one-time programmable FPGAs
64 -- 74Johannes Kneip, Bernd Schmale, Henning Möller. Applying and implementing the MPEG-4 multimedia standard

Volume 19, Issue 5

7 -- 9Richard H. Stern. Licensing IP embodied in standards, Part 2
10 -- 11Richard Mateosian. Pot Pourri
12 -- 15Dieter Gotz, Anton Sauer. MEDIA: A successful European cooperation in microelectronics
16 -- 22Michel Haond, Marie-Thérèse Basso, Walter deCoster, Jos Guelen, Christophe Lair. Developing a 0.18-micron CMOS process
23 -- 32Edgard Laes, Livio Baldi, Claus Dahl, Frits R. J. Huisman, Ludo Deferm. CMOS options for single chip applications
34 -- 43Albert Hasper, Ed Oosterlaken, Frank Huussen, Tanja Claasen-Vujcic. Advanced manufacturing equipment: a vertical batch furnace for 300-mm wafer processing
44 -- 51Teus Hazendonk, Giuseppe Coppola. Preparing for multimedia terminals
52 -- 61Jean-Pierre Tual. MASSC: a generic architecture for multiapplication smart cards
62 -- 70Modeste Addra, Dominique Castel, Jacques Dulongpont, Pierre Genest. Microelectronics in mobile communications: a key enabler
71 -- 79Joseph Borel. Design automation in MEDEA: present and future

Volume 19, Issue 4

3 -- 0Gary S. Robinson. When is two too many? [standards]
4 -- 0Richard Mateosian. Creating documents [book and software package review]
5 -- 6Shane M. Greenstein. Building the virtual world
7 -- 8Richard H. Stern. Licensing IP embodied in standards
9 -- 10Tadao Nakamura. Introducing cool chips
11 -- 22Michael J. Flynn, Patrick Hung, Kevin W. Rudd. Deep submicron microprocessor design issues
23 -- 29Shekhar Borkar. Design challenges of technology scaling
30 -- 37David Ruimy Gonzales. Micro-RISC architecture for the wireless market
38 -- 47Hidehiro Takata, Tetsuya Watanabe, Tetsuo Nakajima, Takashi Takagaki, Hisakazu Sato, Atsushi Mohri, Akira Yamada, Toshiki Kanamoto, Yoshio Matsuda, Shuhei Iwade, Yasutaka Horiba. The D30V/MPEG multimedia processor
48 -- 55Jack Choquette, Mayank Gupta, Dominic McCarthy, Jack Veenstra. High performance RISC microprocessors
56 -- 65Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Yutaka Tashiro, Hiroshi Watanabe, Naoki Kobayashi 0002, Tsuneo Okubo, Ryota Kasai. SuperENC: MPEG-2 video encoder chip
66 -- 79Jean Arlat, Jérome Boué, Yves Crouzet. Validation-based development of dependable systems

Volume 19, Issue 3

6 -- 7Shane M. Greenstein. Forecasting commercial change
9 -- 14Pradip Bose, Thomas M. Conte, Todd M. Austin. Challenges in processor modeling and validation [Guest Editors?? introduction]
15 -- 25Mayan Moudgill, John-David Wellman, Jaime H. Moreno. Environment for PowerPC microarchitecture exploration
26 -- 35Candice Bechem, Jonathan Combs, Noppanunt Utamaphethai, Bryan Black, R. D. (Shawn) Blanton, John Paul Shen. An integrated functional performance simulator
36 -- 46Arvind, Xiaowei Shen. Using term rewriting systems to design and verify processors
47 -- 55Warren A. Hunt Jr., Jun Sawada. Verifying the FM9801 microarchitecture
56 -- 64Steven R. Kunkel, Bill Armstrong, Philip L. Vitale. System optimization for OLTP workloads
66 -- 72Sudheendra Hangal, Mike O'Connor. Performance analysis and validation of the picoJava processor
73 -- 85Tim Horel, Gary Lauterbach. UltraSPARC-III: designing third-generation 64-bit performance

Volume 19, Issue 2

5 -- 0Richard Mateosian. Words of Wisdom
6 -- 7Richard H. Stern. Web concerns [legal aspects]
8 -- 0Shane M. Greenstein. Bill, adopt a mensch strategy
10 -- 11Norman P. Jouppi, John Wawrzynek. Real products, real technology Guest Editor's Introduction]
12 -- 23Timothy J. Slegel, Robert M. Averill III, Mark A. Check, Bruce C. Giamei, Barry Krumm, Christopher A. Krygowski, W. H. Li, John S. Liptay, John D. MacDougall, Thomas J. McPherson, Jennifer A. Navarro, Eric M. Schwarz, Chung-Lung Kevin Shum, Charles F. Webb. IBM's S/390 G5 microprocessor design
24 -- 36Richard E. Kessler. The Alpha 21264 microprocessor
37 -- 48Stuart F. Oberman, Greg Favor, Fred Weber. AMD 3DNow! technology: architecture and implementations
49 -- 57Thomas C. Savell. The EMU10K1 digital audio processor
58 -- 69Joel McCormack, Bob McNamara, Chris Gianos, Norman P. Jouppi, Todd A. Dutton, John H. Zurawski, Larry Seiler, Kenneth W. Correll. Implementing Neon: a 256-bit graphics accelerator
70 -- 81Feng-hsiung Hsu. IBM's Deep Blue Chess grandmaster chips

Volume 19, Issue 1

4 -- 5Richard Mateosian. Happy New Year
6 -- 7Richard H. Stern. When elephants dance, mice watch out! [legal issues]
8 -- 9Shane M. Greenstein. When technologies converge
12 -- 13Nick McKeown, Chase Bailey. The increasingly important interconnect
14 -- 19Kenichi Ishibashi, Tsutomu Goto, Takehisa Hayashi, Tetsuhiko Okada, Akira Yamagiwa, Masabumi Shibata, Kazuhiro Akimoto, Naoki Hamanaka, Toshiro Takahashi, Akio Koyama, Tatsuhiro Aida. Simultaneous bidirectional transceiver logic
20 -- 28Pankaj Gupta, Nick McKeown. Designing and implementing a fast crossbar scheduler
30 -- 41George Kornaros, Dionisios N. Pnevmatikatos, Panagiota Vatsolaki, George Kalokerinos, Chara Xanthaki, Dimitrios Mavroidis, Dimitrios N. Serpanos, Manolis Katevenis. ATLAS I: implementing a single-chip ATM switch with backpressure
42 -- 48Steve R. Kleiman, Scott Schoenthal, Alan Rowe, Steven H. Rodrigues, Arputham Benjamin. Using NUMA interconnects for highly available filers
50 -- 59Stefan Savage, Thomas E. Anderson, Amit Aggarwal, David Becker, Neal Cardwell, Andy Collins, Eric Hoffman, John Snell, Amin Vahdat, Geoffrey M. Voelker, John Zahorjan. Detour: informed Internet routing and transport
60 -- 67Karen Panetta Lentz, Jamie A. Heller, Pier Luca Montessoro. System verification using multilevel concurrent simulation
68 -- 79Alessandro Gabrielli, Enzo Gandolfi. A fast digital fuzzy processor