| 1773 | -- | 1785 | Sheng Yang, S. Saqib Khursheed, Bashir M. Al-Hashimi, David Flynn, Sachin Idgunji. Reliable State Retention-Based Embedded Processors Through Monitoring and Recovery |
| 1786 | -- | 1799 | Tsung-Wei Huang, Shih-Yuan Yeh, Tsung-Yi Ho. A Network-Flow Based Pin-Count Aware Routing Algorithm for Broadcast-Addressing EWOD Chips |
| 1800 | -- | 1813 | Kyosun Kim, Sangho Shin, Sung-Mo Kang. Field Programmable Stateful Logic Array |
| 1814 | -- | 1827 | Wangyang Zhang, Xin Li, Frank Liu, Emrah Acar, Rob A. Rutenbar, Ronald D. Blanton. Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits |
| 1828 | -- | 1841 | Roxana Ionutiu, Joost Rommes, Wil H. A. Schilders. SparseRC: Sparsity Preserving Model Reduction for RC Circuits With Many Terminals |
| 1842 | -- | 1855 | Muhammet Mustafa Ozdal, Renato Fernandes Hentschke. An Algorithmic Study of Exact Route Matching for Integrated Circuits |
| 1856 | -- | 1869 | Yi-Lin Chuang, Sangmin Kim, Youngsoo Shin, Yao-Wen Chang. Pulsed-Latch Aware Placement for Timing-Integrity Optimization |
| 1870 | -- | 1882 | Mark Po-Hung Lin, Chih-Cheng Hsu, Yao-Tsung Chang. Post-Placement Power Optimization With Multi-Bit Flip-Flops |
| 1883 | -- | 1896 | Mohamed M. Sabry, Ayse Kivilcim Coskun, David Atienza, Tajana Simunic Rosing, Thomas Brunschwiler. Energy-Efficient Multiobjective Thermal Control for Liquid-Cooled 3-D Stacked Architectures |
| 1897 | -- | 1910 | Yu-Hsiang Kao, Ming Yang, N. Sertac Artan, H. Jonathan Chao. CNoC: High-Radix Clos Network-on-Chip |
| 1911 | -- | 1922 | Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman. Diagnosis of Interconnect Full Open Defects in the Presence of Fan-Out |
| 1923 | -- | 1934 | Junxia Ma, Mohammad Tehranipoor. Layout-Aware Critical Path Delay Test Under Maximum Power Supply Noise Effects |