Journal: IEEE Trans. VLSI Syst.

Volume 30, Issue 11

1573 -- 1586Chao Fang, Aojun Zhou, Zhongfeng Wang. An Algorithm-Hardware Co-Optimized Framework for Accelerating N: M Sparse Transformers
1587 -- 1600Shengzhao Li, Qin Wang 0009, Jianfei Jiang 0001, Weiguang Sheng, Naifeng Jing, Zhigang Mao. An Efficient CNN Accelerator Using Inter-Frame Data Reuse of Videos on FPGAs
1601 -- 1614Abhishek Ramdas Nair, Pallab Kumar Nath, Shantanu Chakrabartty, Chetan Singh Thakur. Multiplierless MP-Kernel Machine for Energy-Efficient Edge Devices
1615 -- 1630Mustafa Fayez Ali, Sourjya Roy, Utkarsh Saxena, Tanvi Sharma, Anand Raghunathan, Kaushik Roy 0001. Compute-in-Memory Technologies and Architectures for Deep Learning Workloads
1631 -- 1641Yisong Kuang, Xiaoxin Cui, Zilin Wang, Chenglong Zou, Yi Zhong, Kefei Liu 0002, Zhenhui Dai, Dunshan Yu, Yuan Wang 0001, Ru Huang. ESSA: Design of a Programmable Efficient Sparse Spiking Neural Network Accelerator
1642 -- 1653Wenzhe Guo, Mohammed E. Fouda, Ahmed M. Eltawil, Khaled Nabil Salama. Efficient Neuromorphic Hardware Through Spiking Temporal Online Local Learning
1654 -- 1667Krithika Dhananjay, Vasilis F. Pavlidis, Ayse K. Coskun, Emre Salman. High Bandwidth Thermal Covert Channel in 3-D-Integrated Multicore Processors
1668 -- 1676Sankatali Venkateswarlu, Subrat Mishra, Herman Oprins, Bjorn Vermeersch, Moritz Brunion, Jun-Han Han, Mircea R. Stan, Pieter Weckx, Francky Catthoor. Thermal Performance Analysis of Mempool RISC-V Multicore SoC
1677 -- 1690Ying Zhang 0040, Yi Ding, Zebo Peng, Huawei Li, Masahiro Fujita, Jianhui Jiang. BMC-Based Temperature-Aware SBST for Worst-Case Delay Fault Testing Under High Temperature
1691 -- 1704Xiao Hu, Minghao Li, Jing Tian 0004, Zhongfeng Wang. Efficient Homomorphic Convolution Designs on FPGA for Secure Inference
1705 -- 1715Kleber Stangherlin, Manoj Sachdev. Design and Implementation of a Secure RISC-V Microprocessor
1716 -- 1727Seyed Hamidreza Moghadas, Michael Pehl, Georg Sigl. ROPAD: Enhancing the Digital Ring Oscillator Probing Attempt Detector for Protecting Irregular Data Buses
1728 -- 1738Hyunho Park, Hanwool Jeong. Self-Shut-Off Pulsed Latches for Minimizing Sequencing Overhead
1739 -- 1747Fabian Khateb, Tomasz Kulej, Meysam Akbari, Kea-Tiong Tang. A 0.5-V Multiple-Input Bulk-Driven OTA in 0.18-μm CMOS
1748 -- 1756Hesheng Lin, Geert Van der Plas, Xiao Sun, Dimitrios Velenis, Francky Catthoor, Rudy Lauwereins, Eric Beyne. Efficient Backside Power Delivery for High-Performance Computing Systems
1757 -- 1769Ji-Yung Lin, Pieter Weckx, Subrat Mishra, Alessio Spessot, Francky Catthoor. Multitimescale Mitigation for Performance Variability Improvement in Time-Critical Systems
1770 -- 1782Xiaoyang Ma, Hongtao Zhong, Nuo Xiu, Yiming Chen, Guodong Yin, Vijaykrishnan Narayanan, Yongpan Liu, Kai Ni 0004, Huazhong Yang, Xueqing Li. CapCAM: A Multilevel Capacitive Content Addressable Memory for High-Accuracy and High-Scalability Search and Compute Applications
1783 -- 1793Jai-Ming Lin, Liang-Chi Zane, Min-Chia Tsai, Yung-Chen Chen, Che-Li Lin, Chen-Fa Tsai. PPOM: An Effective Post-Global Placement Optimization Methodology for Better Wirelength and Routability
1794 -- 1802Mubeen Zafar, Muhammad Naeem Awais, Muhammad Naeem Shehzad, Abbas Javed. CEVGMM: Computationally Efficient Versatile Generic Memristor Model
1803 -- 1807Irith Pomeranz. Functional Test Sequences as a Source for Partially Functional Launch-on-Shift Tests
1808 -- 1812Wen Xun Lian, Harikrishnan Ramiah, Gabriel Chong, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Yong Chen 0005, Pui-In Mak, Rui Paulo Martins. A -20-dBm Sensitivity RF Energy-Harvesting Rectifier Front End Using a Transformer IMN