The following publications are possibly variants of this publication:
- Test-architecture optimization for TSV-based 3D stacked ICsBrandon Noia, Sandeep Kumar Goel, Krishnendu Chakrabarty, Erik Jan Marinissen, Jouke Verbree. ets 2010: 24-29 [doi]
- Optimization Methods for Post-Bond Testing of 3D Stacked ICsBrandon Noia, Krishnendu Chakrabarty, Erik Jan Marinissen. et, 28(1):103-120, 2012. [doi]
- Test-Architecture Optimization and Test Scheduling for TSV-Based 3-D Stacked ICsBrandon Noia, Krishnendu Chakrabarty, Sandeep Kumar Goel, Erik Jan Marinissen, Jouke Verbree. tcad, 30(11):1705-1718, 2011. [doi]
- Optimization methods for post-bond die-internal/external testing in 3D stacked ICsBrandon Noia, Krishnendu Chakrabarty, Erik Jan Marinissen. itc 2010: 193-201 [doi]