Performance and layout effects of SiGe channel in 14nm UTBB FDSOI: SiGe-first vs. SiGe-last integration

R. Berthelon, François Andrieu, P. Perreau, E. Baylac, A. Pofelski, Emmanuel Josse, D. Dutartre, A. Claverie, Michel Haond. Performance and layout effects of SiGe channel in 14nm UTBB FDSOI: SiGe-first vs. SiGe-last integration. In 46th European Solid-State Device Research Conference, ESSDERC 2016, Lausanne, Switzerland, September 12-15, 2016. pages 127-130, IEEE, 2016. [doi]

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