A CPL-based dual supply 32-bit ALU for sub 180nm CMOS technologies - researchr publication related

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Bhaskar Chatterjee, Manoj Sachdev, Ram Krishnamurthy. A CPL-based dual supply 32-bit ALU for sub 180nm CMOS technologies. In Rajiv V. Joshi, Kiyoung Choi, Vivek Tiwari, Kaushik Roy, editors, Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004. pages 248-251, ACM, 2004. [doi]

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