The following publications are possibly variants of this publication:
- Deterministic logic BIST for transition fault testingValentin Gherman, Hans-Joachim Wunderlich, Jürgen Schlöffel, Michael Garbers. iet-cdt, 1(3):180-186, 2007. [doi]
- Efficient Pattern Mapping for Deterministic Logic BISTValentin Gherman, Hans-Joachim Wunderlich, Harald P. E. Vranken, Friedrich Hapke, Michael Wittke, Michael Garbers. itc 2003: 48-56 [doi]
- Application of Deterministic Logic BIST on Industrial CircuitsGundolf Kiefer, Harald P. E. Vranken, Erik Jan Marinissen, Hans-Joachim Wunderlich. et, 17(3-4):351-362, 2001. [doi]
- Application of deterministic logic BIST on industrial circuitsGundolf Kiefer, Hans-Joachim Wunderlich, Harald P. E. Vranken, Erik Jan Marinissen. itc 2000: 105-114
- Combining deterministic logic BIST with test point insertionHarald P. E. Vranken, Florian Meister, Hans-Joachim Wunderlich. ets 2002: 105-110 [doi]