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Shi-Yu Huang, Li-Ren Huang. PLL-Assisted Timing Circuit for Accurate TSV Leakage Binning. IEEE Design & Test of Computers, 31(4):36-42, 2014. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Programmable Leakage Test and Binning for TSVs With Self-Timed Timing ControlShi-Yu Huang, Yu-Hsiang Lin, Li-Ren Huang, Kun-Han Tsai, Wu-Tung Cheng. tcad, 32(8):1265-1273, 2013. [doi] Programmable Leakage Test and Binning for TSVsYu-Hsiang Lin, Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng. ats 2012: 43-48 [doi]
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