The following publications are possibly variants of this publication:
- A DDR3/4 memory link TX supporting 24-40 Ω, 0.8-1.6 V, 0.8-5.0 Gb/s with slew rate control and thin oxide output stages in 22-nm CMOS SOIMarcel A. Kossel, Christian Menolfi, Thomas Toifl, Pier Andrea Francese, Matthias Braendli, Thomas Morf, Lukas Kull, Toke Meyer Andersen, Hazar Yueksel. esscirc 2014: 135-138 [doi]
- A 112Gb/S 2.6pJ/b 8-Tap FFE PAM-4 SST TX in 14nm CMOSChristian Menolfi, Matthias Braendli, Pier Andrea Francese, Thomas Morf, Alessandro Cevrero, Marcel A. Kossel, Lukas Kull, Danny Luu, Ilter Özkaya, Thomas Toifl. isscc 2018: 104-106 [doi]
- A 28Gb/s source-series terminated TX in 32nm CMOS SOIChristian Menolfi, Juergen Hertle, Thomas Toifl, Thomas Morf, Daniele Gardellini, Matthias Braendli, Peter Buchmann, Marcel A. Kossel. isscc 2012: 334-336 [doi]
- DDR4 transmitter with AC-boost equalization and wide-band voltage regulators for thin-oxide protection in 14-nm SOI CMOS technologyMarcel A. Kossel, Christian Menolfi, Pier Andrea Francese, Lukas Kull, Thomas Morf, Thomas Toifl, Matthias Braendli, Alessandro Cevrero, Danny Luu, Ilter Özkaya, Hazar Yueksel. esscirc 2017: 115-118 [doi]