The following publications are possibly variants of this publication:
- 6.6 A 22.5-to-32Gb/s 3.2pJ/b referenceless baud-rate digital CDR with DFE and CTLE in 28nm CMOSWahid Rahman, Danny Yoo, Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki, Hisakatsu Yamaguchi. isscc 2017: 120-121 [doi]
- A 22.5-to-32-Gb/s 3.2-pJ/b Referenceless Baud-Rate Digital CDR With DFE and CTLE in 28-nm CMOSWahid Rahman, Danny Yoo, Joshua Liang, Ali Sheikholeslami, Hirotaka Tamura, Takayuki Shibasaki, Hisakatsu Yamaguchi. jssc, 52(12):3517-3531, 2017. [doi]
- A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOSTakayuki Shibasaki, Win Chaivipas, Yanfei Chen, Yoshiyasu Doi, Takayuki Hamada, Hideki Takauchi, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura. vlsic 2014: 1-2 [doi]
- A blind ADC-based CDR with digital data interpolation and adaptive CTLE and DFEClifford Ting, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura. cicc 2014: 1-4 [doi]