Table of Contents

• Analog Features Extractor for Ultra-Low Power Embedded AI Listening and Keyword SpottingSebastián Marzetti, Valentin Gies, Valentin Barchasz, Hervé Barthélemy, Hervé Glotin. 1-5 [doi]
• AICAS Grand Challenge 2024: Software and Hardware Co-optimization for General Large Language Model Inference on CPUJunfeng Tan, Guosheng Yu, Jianing Li, Xiaohan Ma, Fang Bao, Evens Pan, David Bian, Yongfu Li 0002, Yuan Du, Li Du, Bo Li, Wei Mao. 1-5 [doi]
• On-Device Domain Learning for Keyword Spotting on Low-Power Extreme Edge Embedded SystemsCristian Cioflan, Lukas Cavigelli, Manuele Rusci, Miguel de Prado, Luca Benini. 6-10 [doi]
• Hardware-Friendly Lightweight Convolutional Neural Network Derivation at The EdgeLi Zhang, Ahmed M. Eltawil, Khaled N. Salama. 11-15 [doi]
• HeteroEML: Heterogeneous Design Methodology of Edge Machine Learning on CPU+FPGA PlatformYi-Ting Wu, Tzu-Yun Yen, Yu-Pei Lin, Bo-Cheng Lai. 16-20 [doi]
• PF-Training: Parameter Freezing for Efficient On-Device Training of CNN-based Object Detectors in Low-Resource EnvironmentsDayoung Chun, Hyuk-Jae Lee, Hyun Kim 0001. 21-25 [doi]
• SNN Architecture for Differential Time Encoding Using Decoupled Processing TimeDaniel Windhager, Bernhard Alois Moser, Michael Lunglmayr. 26-30 [doi]
• Stochastic Spiking Attention: Accelerating Attention with Stochastic Computing in Spiking NetworksZihang Song, Prabodh Katti, Osvaldo Simeone, Bipin Rajendran. 31-35 [doi]
• Neuromorphic Event-based Line Detection on SpiNNakerAmélie Gruel, Adrien F. Vincent, Jean Martinet, Sylvain Saïghi. 36-40 [doi]
• Active Dendrites Enable Efficient Continual Learning in Time-To-First-Spike Neural NetworksLorenzo Pes, Rick Luiken, Federico Corradi, Charlotte Frenkel. 41-45 [doi]
• Neuromorphic Temporal Pattern Detection with Spiking Neural Networks using Synaptic DelaysHugo Bulzomi, Yuta Nakano, Rémy Bendahan, Jean Martinet. 46-50 [doi]
• RNN-Based Low Complexity High Speed Channel Estimation Architectures for Vehicular NetworksSyed Asrar ul Haq, Bhavesh Prasad Dangwal, Sumit Darak. 51-55 [doi]
• Low-Complexity High Speed Residual Network-Augmented Channel Estimation for mmWave Massive MIMOAnurag Gulati, Syed Asrar ul Haq, Sumit Darak, Varun Singh. 56-60 [doi]
• A CNN-based One-shot Blind RX-side-only Equalization Scheme for High-speed SerDes linksYiheng Hui, Yuanlin Nong, He Ma, Jingjing Lv, Lei Chen, Li Du, Yuan Du. 61-65 [doi]
• AI for Antenna Design Re-engineering: Yes, Radiation Patterns Predict Antenna Structures!Anitha Gopi, Elizabeth George, Rahul RK, Alex James 0001. 66-70 [doi]
• Enhancing ASR Performance through Relative Word Frequency in OCR and Normal Word Frequency AnalysisKyudan Jung, Seungmin Bae, Nam-Joon Kim, Jaepil Lim, Hyun Gon Ryu, Hyuk-Jae Lee. 71-74 [doi]
• An end-to-end RNS CNN AcceleratorVasilis Sakellariou, Vassilis Paliouras, Ioannis Kouretas, Hani H. Saleh, Thanos Stouraitis. 75-79 [doi]
• A 28nm 343.5fps/W Vision Transformer Accelerator with Integer-Only Quantized Attention BlockCheng-Chen Lin, Wei Lu, Po-Tsang Huang, Hung-Ming Chen. 80-84 [doi]
• A 54.61-GOPS 96.35-mW Digital Logic Accelerator For Underwater Object Recognition DNN Using 40-nm CMOS ProcessChua-Chin Wang, Shih-Heng Luo, Hsin-Che Wu, Ralph Gerard B. Sangalang, Chewnpu Jou, Harry Hsia, Lan-chou Cho. 85-89 [doi]
• A 266.7 TOPS/W Computing-in Memory Using Single-Ended 6T 4-kb SRAM in 16-nm FinFET CMOS ProcessCheng-Yao Lo, Lean Karlo Santos Tolentino, Jhih-Ying Ke, Jeffrey S. Walling, Yang Yi 0002, Chua-Chin Wang. 90-94 [doi]
• GA-Optimized 6.0-Gbps DDR5 SDRAM I/O Buffer Design for 16-nm FinFET CMOS ProcessJhih-Ying Ke, Lean Karlo Santos Tolentino, Cheng-Yao Lo, Tzung-Je Lee, Chua-Chin Wang. 95-99 [doi]
• DualNet: Efficient Integration of Artificial Neural Network and Spiking Neural Network with Equivalent ConversionSeongyon Hong, Sangyeob Kim, Soyeon Kim, Hoi-Jun Yoo. 100-104 [doi]
• Memory-Centric Computing for Image Classification Using SNN with RRAMNada AbuHamra, Baker Mohammad. 105-109 [doi]
• SPVT: Spiked Pyramid Vision TransformerYazhuo Guo, Yuhan Qin, Song Chen, Yi Kang. 110-113 [doi]
• SNN-LIF Model for Glaucoma ClassificationHarshiv Chandra, Akash Ghosh, Rahul Singh, M. B. Srinivas. 114-118 [doi]
• Self-Resetting Magnetic Tunnel Junction Neuron-based Spiking Neural NetworksAijaz H. Lone, Daniel N. Rahimi, Hossein Fariborzi, Gianluca Setti. 119-123 [doi]
• Driving Towards Safety: Online PPG-based Drowsiness Detection with TCNsPierangelo Maria Rapa, Mattia Orlandi, Andrea Amidei, Alessio Burrello, Roberto Rabbeni, Paolo Pavan, Luca Benini, Simone Benatti. 124-128 [doi]
• SVD-based Peephole and Clustering to Enhance Trustworthiness in DNN ClassifiersLivia Manovi, Lorenzo Capelli, Alex Marchioni, Filippo Martinini, Gianluca Setti, Mauro Mangia, Riccardo Rovatti. 129-133 [doi]
• Strategic Deployment of Honeypots in Blockchain-based IoT SystemsDaniel Commey, Sena Hounsinou, Garth V. Crosby. 134-138 [doi]
• Is Semantic Communication for Autonomous Driving Secured against Adversarial Attacks?Soheyb Ribouh, Abdenour Hadid. 139-143 [doi]
• Attacking a Joint Protection Scheme for Deep Neural Network Hardware Accelerators and ModelsSimon Wilhelmstätter, Joschua Conrad, Devanshi Upadhyaya, Ilia Polian, Maurits Ortmanns. 144-148 [doi]
• TENG: A General-Purpose and Efficient Processor Architecture for Accelerating DNNZekun Zhang, Yujie Cai, Tianjiao Liao, Chengyu Xu, Xin Jiao. 149-153 [doi]
• A Hybrid Heterogeneous Neural Network Accelerator based on Systolic ArrayZilin Wang, Yi Zhong, Guang Chen, Shuo Feng, Youming Yang 0002, Xiaoxin Cui, Yuan Wang 0001. 154-158 [doi]
• Reusing Softmax Hardware Unit for GELU Computation in TransformersChristodoulos Peltekis, Kosmas Alexandridis, Giorgos Dimitrakopoulos. 159-163 [doi]
• A Low-power 3D Point Clouds Matching Processor with 1D-CNN Prediction and CAM-based In-memory kNN SearchingJeongmin Shin, Hoichang Jeong, Seungbin Kim, Keonhee Park, Sangho Lee, KyuHo Lee. 164-168 [doi]
• Advancing Hardware Implementation of Hyperdimensional Computing for Edge IntelligenceEman Hassan, Meriem Bettayeb, Baker Mohammad. 169-173 [doi]
• PyAIM: Pynq-Based Scalable Analog In-Memory Computing Prototyping PlatformMinsang Yu, Minuk Hong, Sugil Lee, Seungsu Kim, Jongeun Lee. 174-178 [doi]
• ILP-based Multi-Branch CNNs Mapping on Processing-in-Memory ArchitectureHaodong Han, Junpeng Wang 0002, Bo Ding, Song Chen 0001. 179-183 [doi]
• An Area and Energy-Efficient SRAM Based Time - Domain Compute-In-Memory Architecture For BNNSubhradip Chakraborty, Dinesh Kushwaha, Anand Bulusu, Sudeb Dasgupta. 184-188 [doi]
• TNN-CIM: An In-SRAM CMOS Implementation of TNN-Based Synaptic Arrays with STDP LearningHarideep Nair, David Barajas-Jasso, Quinn Jacobson, John Paul Shen. 189-193 [doi]
• End-to-End Edge Neuromorphic Object Detection SystemD. A. Silva, Ayan Shymyrbay, Kamilya Smagulova, A. Elsheikh, Mohamed E. Fouda, Ahmed M. Eltawil. 194-198 [doi]
• Fast Object Detection Algorithm using Edge-based Operation Skip Scheme with Viola-Jones MethodCheol Ho Choi, Joonhwan Han, Jeongwoo Cha, Jungho Shin, Hyun Woo Oh. 199-203 [doi]
• An Efficient and Fast Filter Pruning Method for Object Detection in Embedded SystemsHyunjun Ko, Jin-Ku Kang, Yongwoo Kim. 204-207 [doi]
• LATTE: Low-Precision Approximate Attention with Head-wise Trainable Threshold for Efficient TransformerJiing-Ping Wang, Ming-Guang Lin, An-Yeu Andy Wu. 208-212 [doi]
• Exploration for Efficient Depthwise Separable Convolution Networks Deployment on FPGAZhijie Huang, Ao Qie, Chen Zhang, Jie Yang, Xin'an Wang. 213-217 [doi]
• Exploring Memory Access Techniques for Efficient FPGA based 3D CNN Accelerator DesignFatima Hameed Khan, Muhammad Adeel Pasha, Shahid Masud. 218-222 [doi]
• Towards Automated FPGA Compilation of Spiking Neural NetworksAyan Shymyrbay, Mohammed E. Fouda, Ahmed M. Eltawil. 223-227 [doi]
• FPGA-based CNN Acceleration using Pattern-Aware PruningLéo Pradels, Silviu-Ioan Filip, Olivier Sentieys, Daniel Chillet, Thibaut Le Calloch. 228-232 [doi]
• Efficient Hardware Implementation of Artificial Neural Networks on FPGAKasem Khalil, Tamador Mohaidat, Mahmoud Darwich, Ashok Kumar 0001, Magdy A. Bayoumi. 233-237 [doi]
• An Analog Neural Network for Estimating Sea State or Wave Height from Inertial Sensor DataVassilis Alimisis, Andreas Papathanasiou, Georgios Georgousis, Paul P. Sotiriadis. 238-242 [doi]
• Characterization of an Analog MAC Cell with Multi-Bit Resolution for AI Inference AcceleratorsRaphael Nägele, Jakob Finkbeiner, Markus Grözing, Manfred Berroth, Georg Rademacher. 243-247 [doi]
• Evaluating an Analog Main Memory Architecture for All-Analog In-Memory Computing AcceleratorsKazybek Adam, Dipesh C. Monga, Omar Numan, Gaurav Singh, Kari Halonen, Martin Andraud. 248-252 [doi]
• Characterization of a Femtojoule Voltage-to-Time Converter with Rectified Linear Unit Characteristic for Analog Neural Network Inference AcceleratorsJakob Finkbeiner, Raphael Nägele, Markus Grözing, Manfred Berroth, Georg Rademacher. 253-257 [doi]
• Adaptive Mixed MLC-SLC FeFET Mapping for CIM AI Applications Through Simulated AnnealingAlptekin Vardar, Franz Müller 0001, Ipek Geçin, Nellie Laleni, Thomas Kämpfe. 258-262 [doi]
• Early-Exit with Class Exclusion for Efficient Inference of Neural NetworksJingcun Wang, Bing Li 0005, Grace Li Zhang. 263-267 [doi]
• An Efficient Anomalous Sound Detection by Robust Processing and Reformation of ObjectiveTsung-Lin Tsai, Yi-Cheng Lo, An-Yeu Andy Wu. 268-272 [doi]
• Enhancing Anomaly Detection with Entropy Regularization in Autoencoder-based Lightweight CompressionAndriy Enttsel, Alex Marchioni, Gianluca Setti, Mauro Mangia, Riccardo Rovatti. 273-277 [doi]
• Auditory Anomaly Detection using Recurrent Spiking Neural NetworksShreya Kshirasagar, Benjamin Cramer, Andre Guntoro, Christian Mayr 0001. 278-281 [doi]
• Fine-Tuned Based Transfer Learning with Temporal Attention and Physics-Informed Loss for Bearing RUL PredictionPavan Kumar Mp, Zhe-Xiang Tu, Kun-Chih Jimmy Chen. 282-286 [doi]
• FlexBits: A Configurable Lightweight RISC-V Micro-architecture for Flexible Bit-Width ExecutionZhiyuan Xu, Xinyu Kang, Xingbo Wang, Bingzhen Chen, Terry Tao Ye. 287-291 [doi]
• RISCV-FNT: A Fast FNT-based RISC-V Processor for CNN AccelerationBingzhen Chen, Xingbo Wang, Yucong Huang, Zhiyuan Xu. 292-296 [doi]
• RTPE: A High Energy Efficiency Inference Processor with RISC-V based Transformation MechanismZhou Wang, Haochen Du, Baoyi Han, Yanqing Xu, Xiaonan Tang, Yang Zhou, Zhe Zheng, Wenpeng Cui, Yanwei Xiong, Shaojun Wei, Shushan Qiao, Shouyi Yin. 297-301 [doi]
• RCPE: An Excellent Performance Training Processor with RISC-V based Compression MechanismZhou Wang, Haochen Du, Baoyi Han, Yanqing Xu, Xiaonan Tang, Yang Zhou, Zhe Zheng, Wenpeng Cui, Yanwei Xiong, Shaojun Wei, Shushan Qiao, Shouyi Yin. 302-306 [doi]
• A Low-Latency and Scalable Vector Engine with Operation Fusion for TransformersMincheol Cha, Keehyuk Lee, Xuan Truong Nguyen, Hyuk-Jae Lee. 307-311 [doi]
• NeuroSORT: A Neuromorphic Accelerator for Spike-based Online and Real-time TrackingZiyang Shen, Xiaoxu Xie, Chaoming Fang, Fengshi Tian, Shunli Ma, Jie Yang 0033, Mohamad Sawan. 312-316 [doi]
• A 0.2-pJ/SOP Digital Spiking Neuromorphic Processor with Temporal Parallel Dataflow and Efficient Synapse Memory CompressionYu-Hsuan Lin, Kea-Tiong Tang. 317-321 [doi]
• High-Density Digital Neuromorphic Processor with High-Precision Neural and Synaptic Dynamics and Temporal AccelerationJongkil Park, YeonJoo Jeong, Jaewook Kim, Suyoun Lee, Joon Young Kwak, Jong-Keuk Park, Inho Kim. 322-326 [doi]
• Device Feasibility Analysis of Multi-level FeFETs for Neuromorphic ComputingArnob Saha, Bibhas Manna, Sen Lu, Zhouhang Jiang, Kai Ni 0004, Abhronil Sengupta. 327-331 [doi]
• On-Chip Incremental Learning based on Unsupervised STDP ImplementationGuang Chen, Jian Cao, Shuo Feng, Zilin Wang, Yi Zhong, Qibin Li, Xiongbo Zhao, Xing Zhang, Yuan Wang. 332-336 [doi]
• Optimizing Vision Transformers: Leveraging Max and Min Operations for Efficient PruningPhilippe Bich, Chiara Boretti, Luciano Prono, Fabio Pareschi, Riccardo Rovatti, Gianluca Setti. 337-341 [doi]
• Adaptive Image Downscaling for Rate-Accuracy-Latency Optimization of Task-Target Image CompressionHangyul Choi, Seongmoon Jeong, Sangwoon Kwak, Soon-heung Jung, Jong Hwan Ko. 347-351 [doi]
• Fast, Efficient and Lightweight Compressed Image Super-Resolution Network for Edge DevicesJaemyung Kim, Jin-Ku Kang, Yongwoo Kim. 352-356 [doi]
• GaitSpike: Event-based Gait Recognition With Spiking Neural NetworkYing Tao, Chip-Hong Chang, Sylvain Saïghi, Shengyu Gao. 357-361 [doi]
• Approximate Adder Tree Design with Sparsity-Aware Encoding and In-Memory Swapping for SRAM-based Digital Compute-In-Memory MacrosMing-Guang Lin, Jiing-Ping Wang, Cheng-Yang Chang, An-Yeu Andy Wu. 362-366 [doi]
• A Cost-Effective Baugh-Wooley Approximate Multiplier for FPGA-based Machine Learning ComputingShervin Vakili. 367-371 [doi]
• OTFC-LSTM: An Efficient Design of LSTM Accelerator based on On-The-Fly CORDICZhibin Luo, Junyi Mai, Enyi Yao. 372-376 [doi]
• Progressive Variable Precision DNN With Bitwise Ternary AccumulationJunnosuke Suzuki, Mari Yasunaga, Kazushi Kawamura, Thiem Van Chu, Masato Motomura. 377-381 [doi]
• Energy-Efficient Ternary MultiplierRishi Agrawal, Narayanabhatla Savyasachi Abhijith, Uppugunduru Anil Kumar, Sreehari Veeramachaneni, Syed Ershad Ahmed. 382-387 [doi]
• Weight Update Scheme for 1T1R Memristor Array Based Equilibrium PropagationBrady Taylor, Xiaoxuan Yang, Hai Li. 388-392 [doi]
• Dynamic Detection and Mitigation of Read-disturb for Accurate Memristor-based Neural NetworksSumit Diware, Mohammad Amin Yaldagard, Anteneh Gebregiorgis, Rajiv V. Joshi, Said Hamdioui, Rajendra Bishnoi. 393-397 [doi]
• The Ouroboros of Memristors: Neural Networks Facilitating Memristor ProgrammingZhenming Yu, Ming-Jay Yang, Jan Finkbeiner, Sebastian Siegel, John Paul Strachan, Emre Neftci. 398-402 [doi]
• Effect of Line Resistance of Passive Memristive Crossbars on Spiking Neural Network PerformancePierre Lewden, Adrien F. Vincent, Jean Tomas, Chip-Hong Chang, Sylvain Saïghi. 403-407 [doi]
• Vibration may Break the Conductive Filament in amorphous Germanium based MemristorZidu Li, Phil David Börner, Maurice Müller, Andreas Bablich, Peter Haring Bolívar, Bhaskar Choubey. 408-412 [doi]
• An Area-Efficient CNN Accelerator Supporting Global Average Pooling with Arbitrary ShapesYichuan Bai, Xiaopeng Zhang, Qian Wang, Jingjing Lv, Lei Chen, Yuan Du, Li Du. 413-416 [doi]
• ConvMapSim: Modeling and Simulating Convolutional Weight Mapping for PIM ArraysKang Eun Jeon, Wooram Seo, Johnny Rhe, Jong Hwan Ko. 417-421 [doi]
• A Feature Map Lossless Compression Framework for Convolutional Neural Network AcceleratorsZekun Zhang, Xin Jiao, Chengyu Xu. 422-426 [doi]
• CNN Implementation of Bayesian Plasticity for Robust LearningNicolas Ramos, Hai Li. 432-436 [doi]
• A Novel Number Representation and Its Hardware Support for Accurate Low-Bit Quantization on Large Recommender SystemsYu-Da Chu, Pei-Hsuan Kuo, Lyu-Ming Ho, Juinn-Dar Huang. 437-441 [doi]
• AdaQAT: Adaptive Bit-Width Quantization-Aware TrainingCédric Gernigon, Silviu-Ioan Filip, Olivier Sentieys, Clément Coggiola, Mickael Bruno. 442-446 [doi]
• HLC: A Hardware-friendly Quantization and Cache-based Accelerator for TransformerXiangfeng Sun, Yuanting Zhang, Yunchang Jiang, Zheng Li, Bingjin Han, Junyi Mai, Zhibin Luo, Enyi Yao. 447-451 [doi]
• PQDE: Comprehensive Progressive Quantization with Discretization Error for Ultra-Low Bitrate MobileNet towards Low-Resolution ImageryZongcheng Yue, Ran Wu, Longyu Ma, Chong Fu, Chiu-Wing Sham. 452-456 [doi]
• SRU-Q: Hardware-friendly Stochastic Rounding Unit-based Gradient Quantization for CNN TrainingSangbeom Jeong, Dahun Choi, Hyun Kim. 457-461 [doi]
• Resistive Processing Unit-based On-chip ANN Training with Digital MemoryShreyas Deshmukh, Shubham Patil, Anmol Biswas, Vivek Saraswat, Abhishek Kadam, Ajay Kumar Singh, Laxmeesha Somappa, Maryam Shojaei Baghini, Udayan Ganguly. 462-466 [doi]
• The Multilayer Neural Network Implementation Using SRAM-Based Reconfigurable Cognitive Computation MatricesI-Chun Liu, Chun-Jui Chen, Xiu-Zhu Li, Yong-Qi Cheng, Chung-Wei Huang, Pin-Han Lin, Hsuan-Wei Pu, Sheng-Yu Peng, Yu Tsao 0001. 467-471 [doi]
• ACC: Adaptive Compression Framework for Efficient On-device CNN TrainingGilha Lee, SeungIl Lee, Hyun Kim. 472-476 [doi]
• Deploying Artificial Intelligence in Design Verification to Accelerate IP/SoC Sign-off with Zero EscapeSurajit Bhattacherjee, Daksh Shah, Dipankar Pal. 477-481 [doi]
• Variable layout CMOS pixels for end-to-end learning in task specific Image SensorsBhaskar Choubey, Hendrik Sommerhoff, Michael Moeller 0001, Andreas Kolb 0001. 482-486 [doi]
• Accelerator Design using 3D Stacked Capacitorless DRAM for Large Language ModelsJanak Sharda, Po-Kai Hsu, Shimeng Yu. 487-491 [doi]
• Language Modeling on a SpiNNaker2 Neuromorphic ChipKhaleelulla Khan Nazeer, Mark Schöne, Rishav Mukherji, Bernhard Vogginger, Christian Mayr 0001, David Kappel, Anand Subramoney. 492-496 [doi]
• Real Post-Training Quantization Framework for Resource-Optimized Multiplier in LLMsMinseok Seo, Seongho Jeong, Hyuk-Jae Lee, Xuan Truong Nguyen. 497-501 [doi]
• Accelerate Large Language Model Inference on Edge TPU with OpenVX frameworkYou-En Wu, Hsin-I Wu, Kuo-Cheng Chin, Yi-Chun Yang, Ren-Song Tsay. 502-506 [doi]
• Kinship Verification from Text: Towards Discovering Subtitle Textual Features Shared by Family Members using Large Language ModelsSalah Eddine Bekhouche, Abdenour Hadid. 507-511 [doi]
• ILD-MPQ: Learning-Free Mixed-Precision Quantization with Inter-Layer Dependency AwarenessRuge Xu, Qiang Duan, Qibin Chen, Xinfei Guo. 512-516 [doi]
• Q-Segment: Segmenting Images In-Sensor for Vessel-Based Medical DiagnosisPietro Bonazzi, Yawei Li, Sizhen Bian, Michele Magno. 517-521 [doi]
• Microarchitecture Aware Neural Architecture Search for TinyML DevicesJuntao Guan, Gufeng Liu, Fanhong Zeng, Rui Lai, Ruixue Ding, Zhangming Zhu. 522-526 [doi]
• An Energy-Efficient Look-up Table Framework for Super Resolution on FPGAHuanan Li, Shicheng Jia, Juntao Guan, Rui Lai, Shubin Liu, Zhangming Zhu. 527-531 [doi]
• A Hardware-Efficient EMG Decoder with an Attractor-based Neural Network for Next-Generation Hand ProsthesesMohammad Kalbasi, MohammadAli Shaeri, Vincent Alexandre Mendez, Solaiman Shokur, Silvestro Micera, Mahsa Shoaran. 532-536 [doi]
• A Calibratable Model for Fast Energy Estimation of MVM Operations on RRAM CrossbarsJosé Cubero-Cascante, Arunkumar Vaidyanathan, Rebecca Pelke, Lorenzo Pfeifer, Rainer Leupers, Jan Moritz Joseph. 537-538 [doi]
• TPC-NAS: Simple and Effective Neural Architecture Search Based on Total Path CountMing-Shan Huang, Pi-Chuan Chen, Tzi-Dar Chiueh. 542-546 [doi]
• Adapting Spatial Transformer Networks Across Diverse Hardware Platforms: A Comprehensive Implementation StudyMeriem Bettayeb, Eman Hassan, Muhammad Umair Khan, Yasmin Halawani, Hani H. Saleh, Baker Mohammad. 547-551 [doi]
• Error Checking for Sparse Systolic Tensor ArraysChristodoulos Peltekis, Dionysios Filippas, Giorgos Dimitrakopoulos. 552-556 [doi]
• Too-Hot-to-Handle: Insights into Temperature and Noise Hyperparameters for Differentiable Neural-Architecture-SearchesJoschua Conrad, Simon Wilhelmstätter, Rohan Asthana, Vasileios Belagiannis, Maurits Ortmanns. 557-561 [doi]
• A 16-Channel GRU based On-Chip Seizure Classifier for Closed Loop NeuromodulationLakshmi Iyer, Laxmeesha Somappa. 562-566 [doi]
• A Pulse Correlation Model for PPG Signal Quality Assessment and Key Pulse ExtractionShijie Cheng, Ruifang Liu, Hao Wu, Keith Siu-Fung Sze, Qianjin Feng. 567-571 [doi]
• An Efficient Ventricular Arrhythmias Detection on Microcontrollers with Optimized 1D CNNChanwook Hwang, Jaehyeon So, Johnny Rhe, Jiyoon Kim, Juhong Park, Kang Eun Jeon, Jong Hwan Ko. 572-576 [doi]
• An FPGA Accelerator for 3D Cone-beam Sparse-view Computed Tomography ReconstructionYuhan Gu, Qing Wu, Zhechen Yuan, Xiangyu Zhang, Wenyan Su, Yuyao Zhang, Xin Lou. 577-581 [doi]
• CS-Net: An End-to-end Network for Motor Imagery Brain-Machine Interface with Adaptive Channel Selection and Compressed SensingJie Lu, Guanghan Yu, Liyu Qian, Jiacheng Cao, Lirong Zheng 0001, Zhuo Zou. 582-586 [doi]
• Design and Implementation of an Easy-to-Deploy Energy-Efficient Inference Acceleration System for Multi-Precision Neural NetworksPi-Chuan Chen, Yu-Tung Liu, Guo-Yang Zeng, Tzi-Dar Chiueh. 587-591 [doi]
• MSCA: Model-Driven Search for Optimal Configuration for SpMM AcceleratorsYuhan Qin, Yulong Meng, Haitao Du, Yazhuo Guo, Yi Kang. 592-596 [doi]
• OSAHS Detection Capabilities of RingConn Smart Ring: A Feasibility StudyHongbo Guo, Hao Wu 0007, Jiahui Xia, Yibang Cheng, Qianhui Guo, Yi Chen, Tingyan Xu, Jiguang Wang, Guoxing Wang. 597-601 [doi]
• Optimizing with phases: design and application space assessment for networks of phase-locked Ring OscillatorsA. Bazzi, Emmanuel Hardy, J. Ballester, Franck Badets, Louis Hutin. 602-606 [doi]
• Echo State Networks for Accurate and Efficient Modeling of Dynamic CircuitsPaulo Machado, Ruxandra Barbulescu, Luís Miguel Silveira. 607-611 [doi]