Abstract is missing.
- Design-Reliability Flow and Advanced Models Address IC-Reliability IssuesMohamed Selim, Eric Jeandeau, Cyril Descleves. 1-4 [doi]
- Cross-Layer Approaches for an Aging-Aware Design Space Exploration for MicroprocessorsFabian Oboril, Mehdi Baradaran Tahoori. 5-8 [doi]
- NBTI Lifetime Evaluation and Extension in Instruction CachesShengyu Duan, Basel Halak, Rick Wong, Mark Zwolinski. 9-12 [doi]
- Approximating Standard Cell Delay Distributions by Reformulating the Most Probable Failure PointDimitrios Rodopoulos, Philippe Roussel, Francky Catthoor, Yiannakis Sazeides, Dimitrios Soudris. 13-16 [doi]
- Reliability-aware design method for CMOS circuitsTheodor Hillebrand, Nico Hellwege, Steffen Paul, Dagmar Peters-Drolshagen. 17-20 [doi]
- Early failure prediction by using in-situ monitors: Implementation and application resultsAhmed Benhassain, Florian Cacho, Vincent Huard, Lorena Anghel. 21-24 [doi]
- Ageing Impact on a High Speed Voltage Comparator with HysteresisIllani Mohd Nawi, Basel Halak, Mark Zwolinski. 25-29 [doi]
- Overview of Health Monitoring Techniques for ReliabilityAbhijit K. Deb, Bart Vermeulen, Luc van Dijk. 30-33 [doi]
- Static Aging Analysis Using 3-Dimensional Delay LibraryHaider Abbas, Mark Zwolinski, Basel Halak. 34-37 [doi]
- Workload Impact on BTI HCI Induced Aging of Digital Circuits: A System level AnalysisAjith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel. 38-40 [doi]
- LPVM: Low-Power Variation-Mitigant Adder Architecture Using Carry ExpeditionAlireza Namazi, Meisam Abdollahi. 41-44 [doi]