Hiromasa Takahashi - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 13 from 13

2023

Conducting an Experiment at Multiple Sites with Small Subject Pools: How is Raven Score Effective as a Covariate?Kazuhito Ogawa, Yusuke Osaki, Tetsuya Kawamura, Hiromasa Takahashi, Satoshi Taguchi, Yoichiro Fujii, Kengo Kurosaka, Kohei Iyori, Naoki Watanabe 0001. bigdataconf 2023: 3202-3211 [doi]

2022

2020

Can players avoid the tragedy of the commons in a joint debt game?Hiromasa Takahashi, Toru Takemoto, Akihiro Suzuki. ijgt, 49(4):975-1002, 2020. [doi]

2011

A vector coprocessor architecture for embedded systemsYi Ge, Yoshimasa Takebe, Masahiko Toichi, Makoto Mouri, Makiko Ito, Yoshio Hirose, Hiromasa Takahashi. isocc 2011: 195-198 [doi]

2010

A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and `1'/`0' Dual-Array Equalized Reference SchemeRiichiro Takemura, Takayuki Kawahara, Katsuya Miura, Hiroyuki Yamamoto, Jun Hayakawa, Nozomu Matsuzaki, Kazuo Ono, Michihiko Yamanouchi, Kenchi Ito, Hiromasa Takahashi, Shoji Ikeda, Haruhiro Hasegawa, Hideyuki Matsuoka, Hideo Ohno. jssc, 45(4):869-879, 2010. [doi]

2008

2 Mb SPRAM (SPin-Transfer Torque RAM) With Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current ReadTakayuki Kawahara, Riichiro Takemura, Katsuya Miura, Jun Hayakawa, Shoji Ikeda, Young-Min Lee, Ryutaro Sasaki, Yasushi Goto, Kenchi Ito, Toshiyasu Meguro, Fumihiro Matsukura, Hiromasa Takahashi, Hideyuki Matsuoka, Hideo Ohno. jssc, 43(1):109-120, 2008. [doi]

2007

2004

Autonomous decentralized control for formation of multiple mobile robots considering ability of robotHiromasa Takahashi, Hiroaki Nishi, Kouhei Ohnishi. tie, 51(6):1272-1279, 2004. [doi]

1999

1998

A 1.2-W, 2.16-GOPS/720-MFLOPS embedded superscalar microprocessor for multimedia applicationsHajime Kubosawa, Hiromasa Takahashi, Satoshi Ando, Yoshimi Asada, Akira Asato, Atsuhiro Suga, Michihide Kimura, Naoshi Higaki, Hideo Miyake, Tomio Sato, Hideaki Anbutsu, Toshitaka Tsuda, Tetsuo Yoshimura, Isao Amano, Mutsuaki Kai, Shin Mitarai. jssc, 33(11):1640-1648, 1998. [doi]

1993

The μVP 64-bit vector coprocessor: a new implementation of high-performance numerical computationMakoto Awaga, Hiromasa Takahashi. micro, 13(5):24-36, 1993. [doi]

1990

A 64-bit floating-point processing unit with a horizontal instruction code for parallel operationsAkira Katsuno, Hiromasa Takahashi, Hajime Kubosawa, Tomio Sato, Atsuhiro Suga, Gensuke Goto. iccd 1990: 347-350 [doi]

Sign in or sign up to see more results.

runs on WebDSL