Ajai Jain - researchr alias

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Viewing Publication 1 - 13 from 13

2024

Effect of pin shapes on temperature distribution in friction stir lap joint of AA6061 with AZ31 using numerical simulationAmit Yadav, Ajai Jain, Rajiv Verma. ijspm, 21(4):251-263, 2024. [doi]

2022

An approach for optimisation of flexible flow shop group scheduling with sequence dependent set-up time and preventive maintenanceAjai Jain, Avichal Jain. ijcaet, 16(1):40-66, 2022. [doi]

2020

An integrated approach for multi-period manufacturing planning of job-shopsViraj Tyagi, Ajai Jain, P. K. Jain. ijmr, 15(2):148-180, 2020. [doi]

2016

New setup-oriented dispatching rules for a stochastic dynamic job shop manufacturing system with sequence-dependent setup timesPankaj Sharma, Ajai Jain. cera, 24(1):58-68, 2016. [doi]

2013

An approach for integration of process planning and schedulingRakesh Kumar Phanden, Ajai Jain, Rajiv Verma. ijcim, 26(4):284-302, 2013. [doi]

2012

Experimental Investigation of Machining Characteristics for the WEDM of Al/ZrO2(p)-PRMMCSanjeev Kumar Garg, Alakesh Manna, Ajai Jain. ijmmme, 2(4):32-46, 2012. [doi]

2011

Integration of process planning and scheduling: a state-of-the-art reviewRakesh Kumar Phanden, Ajai Jain, Rajiv Verma. ijcim, 24(6):517-534, 2011. [doi]

2003

Stochastic Image Compression Using FractalsAditya Kapoor, Kush Arora, Ajai Jain, G. P. Kapoor. itcc 2003: 574 [doi]

1998

Testability Preserving and Enhancing Transformations for Robust Delay Fault TestabilitAmey Karkare, Manoj Singla, Ajai Jain. vlsid 1998: 370-373 [doi]

Automatic Test Pattern Generation for Sequential Circuits Using Genetic AlgorithmsV. Rajesh, Ajai Jain. vlsid 1998: 270-273 [doi]

1996

An Efficient Test Generation Technique for Sequential Circuits with Repetitive Sub-CircuitsDhruva R. Chakrabarti, Ajai Jain. vlsid 1996: 174-177 [doi]

1995

An improved hierarchical test generation technique for combinational circuits with repetitive sub-circuitsDhruva R. Chakrabarti, Ajai Jain. ats 1995: 237-243 [doi]

1991

A fault-tolerant array processor designed for testability and self-reconfigurationAjai Jain, Babu Mandava, Janusz Rajski, Nicholas C. Rumin. jssc, 26(5):778-788, May 1991. [doi]

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