Alexey Glebov - researchr alias

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Viewing Publication 1 - 10 from 10

2009

Calculation of stress probability for NBTI-aware timing analysisAlexander Stempkovsky, Alexey Glebov, Sergey Gavrilov. isqed 2009: 714-718 [doi]

2004

False-Noise Analysis for Domino CircuitsAlexey Glebov, Sergey Gavrilov, Vladimir Zolotov, Chanhee Oh, Rajendran Panda, Murat R. Becer. date 2004: 784-789 [doi]

Delay noise pessimism reduction by logic correlationsAlexey Glebov, Sergey Gavrilov, R. Soloviev, Vladimir Zolotov, Murat R. Becer, Chanhee Oh, Rajendran Panda. iccad 2004: 160-167 [doi]

2003

SOI Transistor Model for Fast Transient SimulationD. Nadezhin, Sergey Gavrilov, Alexey Glebov, Y. Egorov, Vladimir Zolotov, David Blaauw, Rajendran Panda, Murat R. Becer, Alexandre Ardelea, A. Patel. iccad 2003: 120128 [doi]

2002

False-noise analysis using logic implicationsAlexey Glebov, Sergey Gavrilov, David Blaauw, Vladimir Zolotov. todaes, 7(3):474-498, 2002. [doi]

False-Noise Analysis Using Resolution MethodAlexey Glebov, Sergey Gavrilov, David Blaauw, Vladimir Zolotov, Rajendran Panda, Chanhee Oh. isqed 2002: 437 [doi]

2001

False-Noise Analysis using Logic ImplicationsAlexey Glebov, Sergey Gavrilov, David Blaauw, Supamas Sirichotiyakul, Chanhee Oh, Vladimir Zolotov. iccad 2001: 515 [doi]

1997

1995

Transistor reordering for low power CMOS gates using an SP-BDD representationAlexey Glebov, David Blaauw, Larry G. Jones. islped 1995: 161-166 [doi]

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