Roman Kuznar - researchr alias

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Viewing Publication 1 - 5 from 5

1996

An Experimental Programmable Environment for Prototyping Digital CircuitsAndrej Trost, Roman Kuznar, Andrej Zemva, Baldomir Zajc. fpl 1996: 337-345

1995

PROP: a recursive paradigm for area-efficient and performance oriented partitioning of large FPGA netlistsRoman Kuznar, Franc Brglez. iccad 1995: 644-649 [doi]

1994

A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitionsRoman Kuznar, Baldomir Zajc, Franc Brglez. eurodac 1994: 271-276 [doi]

Multi-way Netlist Partitioning into Heterogeneous FPGAs and Minimization of Total Device Cost and InterconnectRoman Kuznar, Franc Brglez, Baldomir Zajc. dac 1994: 238-243 [doi]

1993

Cost Minimization of Partitions into Multiple DevicesRoman Kuznar, Franc Brglez, Krzysztof Kozminski. dac 1993: 315-320 [doi]

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