Andrej Trost - researchr alias

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Viewing Publication 1 - 21 from 21

2021

Massively parallel binary neural network inference for detecting ships in FPGA systems on the edgeTadej Murovic, Andrej Trost. dsd 2021: 90-96 [doi]

Genetically optimized massively parallel binary neural networks for intrusion detection systemsTadej Murovic, Andrej Trost. comcom, 179:1-10, 2021. [doi]

2020

Resource-optimized combinational binary neural network circuitsTadej Murovic, Andrej Trost. mj, 97:104724, 2020. [doi]

Message from the Program ChairsAndrej Zemva, Andrej Trost. dsd 2020: [doi]

2019

Online VHDL Generator and Analysis ToolAndrej Trost, Andrej Zemva. meco 2019: 1-4 [doi]

2017

Pipeline circuit synthesis from Python codeAndrej Trost, Andrej Zemva. meco 2017: 1-4 [doi]

2015

Configurable hardware components generator in PythonAndrej Trost, Andrej Zemva. meco 2015: 96-99 [doi]

2014

Resolving Collision in EPCglobal Class-1 Gen-2 System by Utilizing the PreambleIztok Bratuz, Andrej Vodopivec, Andrej Trost. TWC, 13(10):5330-5339, 2014. [doi]

Remote laboratory for testing processor cores in FPGA deviceKristjan Saksida, Andrej Trost. miproBIS 2014: 172-177 [doi]

2012

Verification structures for design of video processing circuitsAndrej Trost, Andrej Zemva. miproBIS 2012: 222-227 [doi]

2011

LGMD-based bio-inspired algorithm for detecting risk of collision of a road vehicleAndrej Krejan, Andrej Trost. imspa 2011: 319-324 [doi]

A modelling-based methodology for evaluating the performance of a real-time embedded control systemKlemen Perko, Rémy Kocik, Rédha Hamouche, Andrej Trost. simpra, 19(7):1594-1612, 2011. [doi]

Logic emulators in digital systems educationAndrej Trost, Baldomir Zajc. eurocon 2011: 1-4 [doi]

2009

From high-level real-time software design to low level hardware simulation: a methodology to evaluate performances of control embedded systemsKlemen Perko, Rémy Kocik, Rédha Hamouche, Andrej Trost. pdes 2009: 121-126 [doi]

2008

A Methodology for Supporting System-Level Design Space Exploration at Higher Levels of AbstractionJoze Dedic, Matjaz Finc, Andrej Trost. jcsc, 17(4):703-727, 2008. [doi]

2003

HW/SW Codesign of the MPEG-2 Video DecoderMatjaz Verderber, Andrej Zemva, Andrej Trost. ipps 2003: 179 [doi]

2000

Reusable DSP Functions in FPGAsJernej Andrejas, Andrej Trost. fpl 2000: 456-461 [doi]

Educational Programmable Hardware Prototyping and Verification SystemAndrej Trost, Andrej Zemva, Baldomir Zajc. fpl 2000: 818-821 [doi]

1999

HW/SW Co-Simulation of Target C++ Applications and Synthesizable HDL with Performance EstimationGregor Polansek, Andrej Zemva, Andrej Trost. euromicro 1999: 1468-1471 [doi]

1998

Programmabel Prototyping System for Image ProcessingAndrej Trost, Andrej Zemva, Baldomir Zajc. fpl 1998: 490-494 [doi]

1996

An Experimental Programmable Environment for Prototyping Digital CircuitsAndrej Trost, Roman Kuznar, Andrej Zemva, Baldomir Zajc. fpl 1996: 337-345

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