Table of Contents

• Message from the Program ChairsAndrej Zemva, Andrej Trost. [doi]
• Message from the General ChairAndrej Skraba. 1-2 [doi]
• SHeD: A Framework for Automatic Software Synthesis of Heterogeneous Dataflow Process NetworksOmair Rafique, Klaus Schneider 0001. 1-10 [doi]
• A Glitch-free Clock Multiplexer for Non-Continuously Running ClocksSteffen Zeidler 0001, Oliver Schrape, Anselm Breitenreiter, Milos Krstic. 11-15 [doi]
• Efficient and Exact Design Space Exploration for Heterogeneous and Multi-Bus PlatformsAmna Gharbi, Andrea Enrici, Bogdan Uscumlic, Ludovic Apvrille, Renaud Pacalet. 16-23 [doi]
• Highly Configurable Framework for Adaptive Low Power and Error-Resilient System-On-ChipMitko Veleski, Michael Hübner, Milos Krstic, Rolf Kraemer. 24-28 [doi]
• Revisiting Explicit Enumeration for Exact SynthesisGianluca Martino, Heinz Riener, Görschwin Fey. 29-34 [doi]
• Optimized HW/FW Generation from an Abstract Register Interface ModelMichael Werner, Igli Zeraliu, Zhao Han, Sebastian Prebeck, Lorenzo Servadei, Wolfgang Ecker. 35-39 [doi]
• Hard and Soft Logic Trade-offs for Multipliers in VTRGeorgiy Krylov, Jean-Philippe Legault, Kenneth B. Kent. 40-43 [doi]
• TReMo: A Model for Ternary ReRAM-Based Memories with Adjustable Write-Verification CapabilitiesShima Hosseinzadeh, Mehrdad Biglari, Dietmar Fey. 44-48 [doi]
• Multi Buses: Theory and Practical Considerations of Data Bus Width Scaling in FPGAsLukás Kekely, Jakub Cabal, Viktor Pus, Jan Korenek. 49-56 [doi]
• Efficient Scheduling of FPGAs for Cloud Data Center InfrastructuresMatteo Bertolino, Renaud Pacalet, Ludovic Apvrille, Andrea Enrici. 57-64 [doi]
• Menhir: Generic High-Speed FPGA Model-CheckerEmilien Fournier, Ciprian Teodorov, Loïc Lagadec. 65-72 [doi]
• A hardware architecture for Multiscale Retinex with Chromacity Preservation on an FPGAJorge Andrés Palacios, Vincenzo Caro, Miguel Durán, Miguel Figueroa. 73-80 [doi]
• mcQEMU: Time-Accurate Simulation of Multi-core platforms using QEMUHumberto Carvalho, Geoffrey Nelissen, Pavel Zaykov. 81-88 [doi]
• MPU-based incremental checkpointing for transiently-powered systemsGautier Berthou, Kevin Marquet, Tanguy Risset, Guillaume Salagnac. 89-96 [doi]
• Pipelined ALU for effective external memory access in FPGATomás Benes, Michal Kekely, Karel Hynek, Tomás Cejka. 97-100 [doi]
• Classification-Based Unified Cache Replacement via Partitioned Victim Address HistoryEishi Arima. 101-108 [doi]
• Automatic State Space Analysis for Modeling Untrusted Embedded Device DriversThomas Fehmel, Viet-Tan Nguyen, Dominik Stoffel, Wolfgang Kunz. 109-116 [doi]
• Run-time Monitoring and Trace Analysis Methodology for Component-based Embedded Systems Design FlowVittoriano Muttillo, Giacomo Valente, Luigi Pomante, Hector Posadas, Javier Merino, Eugenio Villar. 117-125 [doi]
• A Comprehensive Trade-off Analysis on the CCSDS 131.2-B-1 Extended ModCod (SCCC-X) ImplementationMatteo Bertolucci, Francesco Falaschi, Riccardo Cassettari, Daniele Davalle, Luca Fanucci. 126-132 [doi]
• Buffer Sizes Reduction for Memory-efficient CNN Inference on Mobile and Embedded DevicesSvetlana Minakova, Todor P. Stefanov. 133-140 [doi]
• A hardware accelerator for entropy estimation using the top-k most frequent elementsJavier E. Soto, Paulo Ubisse, Cecilia Hernández, Miguel E. Figueroa. 141-148 [doi]
• Hardware and Software Components towards the Integration of Network-Attached Accelerators into Data CentersFritjof Steinert, Niklas Schelten, Anton Schulte, Benno Stabernack. 149-153 [doi]
• Challenges of Return-Oriented-Programming on the Xtensa Hardware ArchitectureKai Lehniger, Marcin J. Aftowicz, Peter Langendörfer, Zoya Dyka. 154-158 [doi]
• Predictive Resource Management in Energy-constrained Embedded SystemsSimone Crippa, Giuseppe Massari, Federico Reghenzani, Michele Zanella, William Fornaciari. 159-166 [doi]
• Comparison of Approximate Circuits for H.264 and HEVC Motion EstimationWaqar Ahmad, Berke Ayrancioglu, Ilker Hamzaoglu. 167-173 [doi]
• Efficient Compression Technique for NoC-based Deep Neural Network AcceleratorsJordane Lorandel, Habiba Lahdhiri, Emmanuelle Bourdel, Salvatore Monteleone, Maurizio Palesi. 174-179 [doi]
• μ-Genie: A Framework for Memory-Aware Spatial Processor Architecture Co-Design ExplorationGiulio Stramondo, Manil Dev Gomony, Bartek Kozicki, Cees de Laat, Ana Lucia Varbanescu. 180-184 [doi]
• Dynamic encoding, a lightweight combined countermeasure against hardware attacksMaxime Montoya, Simone Bacles-Min, Anca Molnos, Jacques J. A. Fournier. 185-192 [doi]
• Towards High-Level Synthesis of Polymorphic Side-Channel CountermeasuresPetr Socha, Martin Novotný. 193-199 [doi]
• Optimizing Picnic for Limited Memory ResourcesJohannes Winkler, Andrea Höller, Christian Steger. 200-204 [doi]
• Comparison of three counter value based ROPUFs on FPGAFilip Kodýtek, Róbert Lórencz, Jirí Bucek. 205-212 [doi]
• SCAAT: Secure Cache Alternative Address Table for mitigating cache logical side-channel attacksAmeer Shalabi, Tara Ghasempouri, Peeter Ellervee, Jaan Raik. 213-217 [doi]
• Are ring oscillators without a combinatorial loop good enough for Hardware Trojan detection?Lampros Pyrgas, Aliki Panagiotarou, Paris Kitsos. 218-221 [doi]
• RISC-V Extension for Lightweight CryptographyEtienne Tehrani, Tarik Graba, Abdelmalek Si-Merabet, Jean-Luc Danger. 222-228 [doi]
• + Implementations: Mind the GlitchDorian Amiet, Lukas Leuenberger, Andreas Curiger, Paul Zbinden. 229-237 [doi]
• Evaluation of the Sensitivity of RRAM Cells to Optical Fault Injection AttacksDmytro Petryk, Zoya Dyka, Eduardo Pérez, Mamathamba Kalishettyhalli Mahadevaiaha, Ievgen Kabin, Christian Wenger, Peter Langendörfer. 238-245 [doi]
• Confidaent: Control FLow protection with Instruction and Data Authenticated EncryptionOlivier Savry, Mustapha El-Majihi, Thomas Hiscock. 246-253 [doi]
• A Programmable SoC Implementation of the DGK Cryptosystem for Privacy-Enhancing TechnologiesMilad Bahadori, Kimmo Järvinen 0001. 254-261 [doi]
• Novel Bloom filter algorithms and architectures for ultra-high-speed network security applicationsArish Sateesan, Jo Vliegen, Joan Daemen, Nele Mentens. 262-269 [doi]
• Breaking a fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic CurvesIevgen Kabin, Zoya Dyka, Dan Klann, Nele Mentens, Lejla Batina, Peter Langendörfer. 270-276 [doi]
• Lightweight Security Data Streaming, Based on Reconfigurable Logic, for FPGA PlatformMarios Tsavos, Nicolas Sklavos, George Ph. Alexiou. 277-280 [doi]
• Novel Controller for Dummy Rounds Scheme DPA CountermeasurePetr Moucha, Stanislav Jerábek, Martin Novotný. 281-284 [doi]
• Challenges and Opportunities of IoT and AI in PneumologyMaurizio Mongelli, Vanessa Orani, Enrico Cambiaso, Ivan Vaccari, Alessia Paglialonga, Fulvio Braido, Chiara Eva Catalano. 285-292 [doi]
• An Hardware Recurrent Neural Network for Wearable DevicesEmanuele Torti, Cristina D'Amato, Giovanni Danese, Francesco Leporati. 293-300 [doi]
• On a Security-oriented Design Framework for Medical IoT Devices: The Hardware Security PerspectiveKonstantinos Nomikos, Athanasios Papadimitriou, George Stergiopoulos, Dimitris Koutras, Mihalis Psarakis, Panayiotis Kotzanikolaou. 301-308 [doi]
• Low Power Tiny Binary Neural Network with improved accuracy in Human Recognition SystemsAntonio De Vita, Danilo Pau, Luigi Di Benedetto, Alfredo Rubino, Frédéric Pétrot, Gian Domenico Licciardo. 309-315 [doi]
• An Active Implant to Restore Dental ProprioceptivityJosé Machado da Silva, Ilaria Cerrone, Daniel Malagon, Jorge Marinho, Stephen Mundy, João Gaspar, Joaquim Gabriel Mendes. 316-319 [doi]
• System Architecture and Security Issues of Smartphone-based Point-Of-Care DevicesChristian Zajc, Gerald Holweg, Christian Steger. 320-324 [doi]
• Kamel: IP-XACT compatible intermediate meta-model for IP generationAntti Rautakoura, Matti Käyrä, Timo D. Hämäläinen, Wolfgang Ecker, Esko Pekkarinen, Mikko Teuho. 325-331 [doi]
• AxBy: Approximate Computation Bypass for Data-Intensive ApplicationsDongning Ma, Xun Jiao. 332-339 [doi]
• Design of a 32-bit, dual pipeline superscalar RISC-V processor on FPGAT. Gokulan, Akshay Muraleedharan, Kuruvilla Varghese. 340-343 [doi]
• UP2DATE: Safe and secure over-the-air software updates on high-performance mixed-criticality systemsIrune Agirre, Peio Onaindia, Tomaso Poggi, Irune Yarza, Francisco J. Cazorla, Leonidas Kosmidis, Kim Grüttner, Mohammed Abuteir, Jan Loewe, Juan M. Orbegozo, Stefania Botta. 344-351 [doi]
• The VALU3S ECSEL Project: Verification and Validation of Automated Systems Safety and SecurityR. Barbosa, Stylianos Basagiannis, Georgios Giantamidis, H. Becker, Enrico Ferrari, J. Jahic, A. Kanak, M. Labayen Esnaola, V. Orani, D. Pereira, Luigi Pomante, R. Schlick, A. Smrcka, A. Yazici, Peter Folkesson, Behrooz Sangchoolie. 352-359 [doi]
• Programmable Systems for Intelligence in Automobiles (PRYSTINE): Technical Progress after Year 2Norbert Druml, Björn Debaillie, Andrei Anghel, Nicolae-Catalin Ristea, Jonas Fuchs, Anand Dubey, Torsten Reißland, Maike Hartstem, Viktor Rack, Anna Ryabokon, Kaspars Ozols, Rihards Novickis, Aleksandrs Levinskis, Omar Veledar, Georg Macher, Johannes Jany-Luig, Selim Solmaz, Jakob Reckenzaun, Naveen Mohan, Shai Ophir, Georg Stettinger, Sergio E. Diaz, Mauricio Marcano, Jorge Villagra, Andrea Castellano, Rutger Beekelaar, Fabio Tango, Jarno Vanne, Kalle Holma, Oguz Icoglu, George Dimitrakopoulos. 360-369 [doi]
• SELENE: Self-Monitored Dependable Platform for High-Performance Safety-Critical SystemsCarles Hernández, José Flich, Roberto Paredes, Charles-Alexis Lefebvre, Imanol Allende, Jaume Abella, David Trillin, Martin Matschnig, Bernhard Fischer, Konrad Schwarz, Jan Kiszka, Martin Rönnbäck, Johan Klockars, Nicholas Mc Guire, Franz Rammerstorfer, Christian Schwarzl, Franck Wartel, Dierk Lüdemann, Mikel Labayen. 370-377 [doi]
• Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL ProjectLuigi Pomante, Francesca Palumbo, Claudia Rinaldi, Giacomo Valente, Carlo Sau, Tiziana Fanni, Frank van der Linden 0001, Twan Basten, Marc Geilen, Geran Peeren, Jirí Kadlec, Pekka Jääskeläinen, Marcos Martinez de Alejandro, Jukka Saarinen, Tero Säntti, Maria Katiuscia Zedda, Victor Sanchez, Dip Goswami, Zaid Al-Ars, Ad de Beer. 378-385 [doi]
• MULTI-modal Imaging of FOREnsic SciEnce Evidence: MULTI-FORESEE ProjectNicolas Sklavos, Simona Francese. 386-392 [doi]
• The ECSEL FRACTAL Project: A Cognitive Fractal and Secure edge based on a unique Open-Safe-Reliable-Low Power Hardware PlatformAizea Lojo, Leire Rubio, Jesus Miguel Ruano, Tania Di Mascio, Luigi Pomante, Enrico Ferrari, Ignacio Garcìa Vega, Frank K. Gürkaynak, Mikel Labayen Esnaola, Vanessa Orani, Jaume Abella. 393-400 [doi]
• Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum ComputersPhilipp Niemann, Alexandre A. A. de Almeida, Gerhard W. Dueck, Rolf Drechsler. 401-407 [doi]
• ToPoliNano and fiction: Design Tools for Field-coupled NanocomputingUmberto Garlando, Marcel Walter, Robert Wille, Fabrizio Riente, Frank Sill Torres, Rolf Drechsler. 408-415 [doi]
• Preliminary findings on tools for the analysis of mental activity of programmers using EEG data from portable devicesRozaliya Amirova, Vladimir Ivanov 0001, Sergey Masyagin, Aldo Spallone, Giancarlo Succi. 416-419 [doi]
• Design of Compact Integrated Photonic Crystal NAND and NOR Logic GatesL. E. Pedraza Caballero, Michelle Povinelli, Jhonattan C. Ramirez, Paulo Guimarães, Omar P. Vilela Neto. 420-427 [doi]
• Geometric Refactoring of Quantum and Reversible Circuits: Quantum LayoutMartin Lukac, Saadat Nursultan, Georgiy Krylov, Oliver Keszöcze. 428-435 [doi]
• Online GPUAnalysis using Adaptive DMA Controlled by Softcore for 2D DetectorsR. Ponsard, N. Janvier, Dominique Houzet, Vincent Fristot, W. Mansour. 436-439 [doi]
• Architecture of a Public Transport Supervision System Using Hybridization Models Based on Real and Predictive DataAhmed Amrani, Hakim Arezki, David Lellouche, Vivien Gazeau, Corinne Fillol, Oussama Allali, Thomas Lacroix. 440-446 [doi]
• A Hybrid Timestamping Approach for Multi-Sensor Perception SystemsJosef Steinbaeck, Christian Steger, Eugen Brenner, Norbert Druml. 447-454 [doi]
• Energy-Optimized Elastic Application Distribution for Automotive Systems in Hybrid Cloud ArchitecturesPhilipp Weber, Philipp Weiss, Dominik Reinhardt, Sebastian Steinhorst. 455-462 [doi]
• Enabling Fail-Operational Behavior and Degradation for Safety-Critical Automotive 3D Flash LiDAR SystemsAndreas Strasser, Philipp Stelzer, Felix Warmer, Christian Steger, Norbert Druml. 463-468 [doi]
• Adaptive MEMS Mirror Control for Reliable Automotive Driving Assistance ApplicationsIevgeniia Maksymova, Philipp Greiner, Christian Steger, Leonhard Christian Niedermueller, Norbert Druml. 469-475 [doi]
• Assuring the Safety of End-to-End Learning-Based Autonomous Driving through Runtime MonitoringJörg Grieser, Meng Zhang, Tim Warnecke, Andreas Rausch. 476-483 [doi]
• Design of Radiation Hardened RADFET Readout System for Space ApplicationsMarko S. Andjelkovic, Aleksandar Simevski, Junchao Chen, Oliver Schrape, Zoran Stamenkovic, Milos Krstic, Stefan Ilic, Luka Spahic, Laza Kostic, Goran S. Ristic, Aleksandar Jaksic, Alberto J. Palma, Antonio M. Lallena, Miguel Angel Carvaja. 484-488 [doi]
• Key Enabling Technologies for DronesMahmoud Hussein, Réda Nouacer, Yassine Ouhammou, Eugenio Villar, Federico Corradi, Carlo Tieri, Rodrigo Castiñeira. 489-496 [doi]
• Drones for Inspection of Overhead Power Lines with Recharge FunctionGerd vom Bögel, Linda Cousin, Nicolai Iversen, Emad Samuel Malki Ebeid, Andreas Hennig. 497-502 [doi]
• Cloud to Cable: A Drone Framework for Autonomous Power line InspectionOscar Bowen Schofield, Kasper Høj Lorenzen, Emad Ebeid. 503-509 [doi]
• Impact of the Array Shape and Memory Bandwidth on the Execution Time of CNN Systolic ArraysEduardo Yago, Pau Castelló, Salvador Petit, María E. Gómez, Julio Sahuquillo. 510-517 [doi]
• Combining Machine Learning and Formal Techniques for Small Data Applications - A Framework to Explore New Structural MaterialsRolf Drechsler, Sebastian Huhn 0001, Christina Plump. 518-525 [doi]
• DNNZip: Selective Layers Compression Technique in Deep Neural Network AcceleratorsHabiba Lahdhiri, Maurizio Palesi, Salvatore Monteleone, Davide Patti, Giuseppe Ascia, Jordane Lorandel, Emmanuelle Bourdel, Vincenzo Catania. 526-533 [doi]
• Data Footprint Reduction in DNN Inference by Sensitivity-Controlled Approximations with Online ArithmeticAbdus Sami Hassan, Tooba Arifeen, Jeong-A Lee. 534-541 [doi]
• Toward unsupervised Human Activity Recognition on Microcontroller UnitsPierre-Emmanuel Novac, Andrea Castagnetti, Adrien Russo, Benoît Miramond, Alain Pegatoquet, François Verdier, Andrea Castagnetti. 542-550 [doi]
• PET-to-MLIR: A polyhedral front-end for MLIRKonrad Komisarczyk, Lorenzo Chelini, Kanishkan Vadivel, Roel Jordans, Henk Corporaal. 551-556 [doi]
• Crop Type Classification based on Machine Learning with Multitemporal Sentinel-1 DataJacob Høxbroe Jeppesen, Rune Hylsberg Jacobsen, Rasmus Nyholm Jørgensen. 557-564 [doi]
• Embedded object detection applying Deep Neural Networks in railway domainMikel Etxeberria-Garcia, Fernando Ezaguirre, Joanes Plazaola, Unai Muñoz, Maider Zamalloa. 565-569 [doi]
• Strengthening Post-Quantum Security for Automotive SystemsTim Fritzmann, Jonas Vith, Johanna Sepúlveda. 570-576 [doi]
• A Lightweight Blockchain-based Technique for Anti-Tampering in Wireless Sensor NetworksWalter Tiberti, Alessio Carmenini, Luigi Pomante, Dajana Cassioli. 577-582 [doi]
• Intrusion Detection for SOME/IP: Challenges and OpportunitiesTobias Gehrmann, Paul Duplys. 583-587 [doi]
• SEAMLESS Project: Development of a Performing Secure Platform for IEEE 802.15.4 WSN ApplicationsLuigi Pomante, Marco Pugliese, Luciano Bozzi, Walter Tiberti, D. Grimani, Fortunato Santucci. 588-595 [doi]
• A Formal Model for the Automatic Configuration of Access Protection Units in MPSoC-Based Embedded SystemsTobias Dörr, Timo Sandmann, Jürgen Becker 0001. 596-603 [doi]
• Towards Formalization of Enhanced Privacy ID (EPID)-based Remote Attestation in Intel SGXMuhammad Usama Sardar, Do Le Quoc, Christof Fetzer. 604-607 [doi]
• Active Redundant Hardware Architecture for Increased Reliability in FPGA-Based Nuclear Reactors Critical SystemsMarcos Santana Farias, Nadia Nedjah, Paulo Victor R. de Carvalho. 608-615 [doi]
• Design Concept for Radiation-Hardening of Triple Modular Redundancy TSPC Flip-FlopsOliver Schrape, Marko S. Andjelkovic, Anselm Breitenreiter, Alexey Balashov, Milos Krstic. 616-621 [doi]
• Evaluation of Fault Tolerant Online Scheduling Algorithms for CubeSatsPetr Dobiás, Emmanuel Casseau, Oliver Sinnen. 622-629 [doi]
• An Approach to Cost-Efficient Fault Tolerance in Inherently Redundant Fail-Operational SystemsTobias Dörr, Timo Sandmann, Patrick Friederich, Arnd Leitner, Jürgen Becker 0001. 630-637 [doi]
• Adjustable self-healing methodology for accelerated functions in heterogeneous systemsMohammad Riazati, Tara Ghasempouri, Masoud Daneshtalab, Jaan Raik, Mikael Sjödin, Björn Lisper. 638-645 [doi]
• Implementation-Independent Functional Test for Transition Delay Faults in MicroprocessorsAdeboye Stephen Oyeniran, Raimund Ubar, Maksim Jenihhin, Jaan Raik. 646-650 [doi]
• Quantitative and Qualitative Evaluation Methods of Automotive Time of Flight Based SensorsCaterina Nahler, Christian Steger, Norbert Druml. 651-659 [doi]
• Trading the Reliability of Approximate TMR in FPGAs with the Cost of MitigationUmar Afzaal, Jeong-A Lee. 660-663 [doi]
• Non-Homogeneous Continuous Time Markov Chains CalculationsJan Reznícek, Martin Kohlík, Hana Kubátová. 664-671 [doi]
• Evaluating Convolutional Neural Networks Reliability depending on their Data RepresentationAnnachiara Ruospo, Alberto Bosio, Alessandro Ianne, Ernesto Sánchez 0001. 672-679 [doi]
• Hardening of Smart Electronic Lock Software against Random and Deliberate FaultsJakub Lojda, Richard Panek, Jakub Podivinsky, Ondrej Cekan, Martin Krcma, Zdenek Kotásek. 680-683 [doi]
• Evaluation of the SEU Faults Coverage of a Simple Fault Model for Application-Oriented FPGA TestingJaroslav Borecký, Robert Hülle, Petr Fiser. 684-691 [doi]