Andrej Zemva - researchr alias

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Viewing Publication 1 - 23 from 23

2021

Image Acquisition Device for Smart-City Access Control Applications Based on Iris RecognitionDamjan Zadnik, Andrej Zemva. sensors, 21(18):6185, 2021. [doi]

2020

Message from the Program ChairsAndrej Zemva, Andrej Trost. dsd 2020: [doi]

2019

Online VHDL Generator and Analysis ToolAndrej Trost, Andrej Zemva. meco 2019: 1-4 [doi]

2017

Pipeline circuit synthesis from Python codeAndrej Trost, Andrej Zemva. meco 2017: 1-4 [doi]

2015

Configurable hardware components generator in PythonAndrej Trost, Andrej Zemva. meco 2015: 96-99 [doi]

2012

Communication-control concept in distribution network with dispersed energy resourcesJure Mocnik, Andrej Zemva. isgteurope 2012: 1-6 [doi]

A systematic approach to configurable functional verification of HW IP blocks at transaction levelTomaz Nahtigal, Primoz Puhar, Andrej Zemva. cee, 38(6):1513-1523, 2012. [doi]

Verification structures for design of video processing circuitsAndrej Trost, Andrej Zemva. miproBIS 2012: 222-227 [doi]

2011

Simulation and Verification of a Dynamic Model of the Electric Forklift TruckKristjan Basa, Andrej Zemva. iasc, 17(1):13-30, 2011. [doi]

2010

FPGA-oriented HW/SW implementation of ECG beat detection and classification algorithmMatej Cvikl, Andrej Zemva. dsp, 20(1):238-248, 2010. [doi]

2009

The integration of home-automation and IPTV system and servicesMark Umberger, Iztok Humar, Andrej Kos, Joze Guna, Andrej Zemva, Janez Bester. csi, 31(4):675-684, 2009. [doi]

2008

Functional Verification of a USB Host ControllerPrimoz Puhar, Andrej Zemva. dsd 2008: 735-740 [doi]

2007

Hardware Implementation of a Modified Delay-Coordinate Mapping-Based QRS Complex Detection AlgorithmMatej Cvikl, Franc Jager, Andrej Zemva. ejasp, 2007, 2007. [doi]

FPGA-oriented HW/SW implementation of the MPEG-4 video decoderAndrej Zemva, Matjaz Verderber. mam, 31(5):313-325, 2007. [doi]

2005

Test generation for technology-specific multi-faults based on detectable perturbationsAndrej Zemva, Baldomir Zajc. mr, 45(1):163-173, 2005. [doi]

2003

HW/SW Codesign of the MPEG-2 Video DecoderMatjaz Verderber, Andrej Zemva, Andrej Trost. ipps 2003: 179 [doi]

HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video DecoderMatjaz Verderber, Andrej Zemva, Damjan Lampret. date 2003: 20238-20243 [doi]

2000

Educational Programmable Hardware Prototyping and Verification SystemAndrej Trost, Andrej Zemva, Baldomir Zajc. fpl 2000: 818-821 [doi]

1999

HW/SW Co-Simulation of Target C++ Applications and Synthesizable HDL with Performance EstimationGregor Polansek, Andrej Zemva, Andrej Trost. euromicro 1999: 1468-1471 [doi]

1998

Programmabel Prototyping System for Image ProcessingAndrej Trost, Andrej Zemva, Baldomir Zajc. fpl 1998: 490-494 [doi]

1996

An Experimental Programmable Environment for Prototyping Digital CircuitsAndrej Trost, Roman Kuznar, Andrej Zemva, Baldomir Zajc. fpl 1996: 337-345

1995

Detectable perturbations: a paradigm for technology-specific multi-fault test generationAndrej Zemva, Franc Brglez. vts 1995: 350-357 [doi]

1994

A Functionality Fault Model: Feasibility and ApplicationsAndrej Zemva, Franc Brglez, Krzysztof Kozminski, Baldomir Zajc. eurodac 1994: 152-158

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