Rong Lin - researchr alias

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Viewing Publication 1 - 57 from 57

2022

Research on the precise employment model of college students from the perspective of competencyRong Lin. ifip8-3 2022: 289-291 [doi]

2021

Contrastive Learning Framework by Maximizing Mutual Information for Visual Question AnsweringRong Lin, Chun-Yang Zhang. spac 2021: 483-488 [doi]

2020

Effects of Commensurability on the Friction and Energy Dissipation in Graphene/Graphene InterfaceRong Lin, Zhiyong Wei, Yunfei Chen. nems 2020: 524-528 [doi]

2016

Application research of the power line carrier communication multiband based on G3 technologyPing Hu, Shi Peng, Chengmin Wang, Huicong Fan, Rong Lin, Yong Liu. icsai 2016: 814-818 [doi]

2005

An Empirical Study on the Specification and Selection of Components Using Fuzzy LogicKendra Cooper, João W. Cangussu, Rong Lin, Ganesan Sankaranarayanan, Ragouramane Soundararadjane, W. Eric Wong. cbse 2005: 155-170 [doi]

2003

A Reconfigurable Low-Power High-Performance Matrix Multiplier Architecture with Borrow Parallel CountersRong Lin. ipps 2003: 182 [doi]

An Efficient Parallel Prefix Sums Architecture with Domino LogicRong Lin, Koji Nakano, Stephan Olariu, Albert Y. Zomaya. tpds, 14(9):922-931, 2003. [doi]

2002

Bit-Matrix Decomposition and Dynamic Reconfiguration: A Unified Arithmetic Processor Architecture, Design and TestRong Lin. ipps 2002: [doi]

Fast Inner Product Computation on Short BusesRong Lin, Stephan Olariu. vlsi, 2002(4):337-347, 2002. [doi]

Novel design and verification of a 16 x 16-b self-repairable reconfigurable inner product processorRong Lin, Martin Margala. glvlsi 2002: 172-177 [doi]

2001

A run-time reconfigurable array of multipliers architectureRong Lin. ipps 2001: 143

Reconfigurable parallel inner product processor architecturesRong Lin. tvlsi, 9(2):261-272, 2001. [doi]

Inner Product Processor Designs Using High-Performance, Non-Binary Logic CircuitsRong Lin. ISCApdcs 2001: 345-350

Trading Bitwidth For Array Size: A Unified Reconfigurable Arithmetic Processor DesignRong Lin. isqed 2001: 325-330 [doi]

A Regularly Structured Parallel Multiplier with Low-power Non-binary-logic Counter CircuitsRong Lin. vlsi, 2001(3):377-390, 2001. [doi]

2000

1999

A Novel Approach for CMOS Parallel Counter DesignRong Lin, Kevin E. Kerr, André S. Botha. euromicro 1999: 1112-1119 [doi]

Efficient VLSI architectures for ColumnsortRong Lin, Stephan Olariu. tvlsi, 7(1):135-138, 1999. [doi]

The Mesh with Hybrid Buses: An Efficient Parallel Architecture for Digital GeometryRong Lin, Stephan Olariu, James L. Schwing, Biing-Feng Wang. tpds, 10(3):266-280, 1999. [doi]

Reconfigurable Shift Switching Parallel ComparatorsRong Lin, Stephan Olariu. vlsi, 1999(1):83-90, 1999. [doi]

An Efficient VLSI Architecture Parallel Prefix Counting With Domino LogicRong Lin, Koji Nakano, Stephan Olariu, Albert Y. Zomaya. ipps 1999: 273 [doi]

Scalable Hardware-Algorithms for Binary Prefix SumsRong Lin, Koji Nakano, Stephan Olariu, Maria Cristina Pinotti, James L. Schwing, Albert Y. Zomaya. ipps 1999: 634-642

Guest EditorialStephan Olariu, Rong Lin. vlsi, 1999(1), 1999. [doi]

1998

A Fast Parallel Algorithm to Recognize P4-sparse GraphsRong Lin, Stephan Olariu. DAM, 81(1-3):191-215, 1998. [doi]

A Scalable VLSI Architecture for Binary Prefix SumsRong Lin, Koji Nakano, Stephan Olariu, Maria Cristina Pinotti, James L. Schwing, Albert Y. Zomaya. ipps 1998: 333-337 [doi]

1997

Reconfigurable buses with shift switches for fast final additions of parallel multipliersRong Lin. pdpta 1997: 513-521

Fast multiplier schemes using large parallel counters and shift switchesRong Lin. hipc 1997: 302-308 [doi]

1995

A simple array processor for binary prefix sumsRong Lin, Stephan Olariu. asap 1995: 113 [doi]

A Cost-optimal Erew Breadth-first Algorithm for Ordered Trees, with ApplicationsRong Lin, Stephan Olariu. paapp, 5(3):187-197, 1995. [doi]

Reconfigurable Buses with Shift Switching: Concepts and ApplicationsRong Lin, Stephan Olariu. tpds, 6(1):93-102, 1995. [doi]

1994

Time-Optimal Multiple Rank Computations on Meshes with Multiple BroadcastingDharmavani Bhagavathi, Venkatavasu Bokka, Himabindu Gurla, Rong Lin, Stephan Olariu, James L. Schwing, W. Shen, Larry Wilson. icpp 1994: 35-38

Convolution Computation on Shift Switching BusesRong Lin. hicss 1994: 120-129

An efficient VLSI architecture for digital geometryRong Lin, Stephan Olariu, James L. Schwing. asap 1994: 392-403 [doi]

Application-specific array processors for binary prefix sum computationRong Lin, Stephan Olariu. spdp 1994: 118-125 [doi]

An Optimal Parallel Matching Algorithm for CographsRong Lin, Stephan Olariu. jpdc, 22(1):26-36, 1994.

Computing on Reconfigurable Buses - A New Computational ParadigmRong Lin, Stephan Olariu, James L. Schwing, Jingyuan Zhang. ppl, 4:465-476, 1994.

An Efficient Erew Algorithm for Minimum Path Cover and Hamiltonicity on CographsRong Lin, Stephan Olariu, James L. Schwing, Jingyuan Zhang. paapp, 2(1-2):99-113, 1994. [doi]

1993

Square Meshes Are Not Optimal For Convex Hull ComputationDharmavani Bhagavathi, Himabindu Gurla, Stephan Olariu, Rong Lin, James L. Schwing, Jingyuan Zhang. icpp 1993: 307-310

A practical constant time sorting networkRong Lin, Stephan Olariu. asap 1993: 380-391 [doi]

Simulating Enhanced Meshes, with ApplicationsRong Lin, Stephan Olariu, James L. Schwing, Jingyuan Zhang. ppl, 3:59-70, 1993.

1992

Reconfigurable Buses with Shift Switching - VLSI RADIX SortRong Lin. icpp 1992: 2-9

Computing the Inner Product on Reconfigurable Buses with Shift SwitchingRong Lin, Stephan Olariu. conpar 1992: 181-192

A fast cost-optimal parallel algorithm for the lowest common ancestor problemRong Lin, Stephan Olariu. pc, 18(5):511-516, 1992.

1991

1990

4-reducible graphsRong Lin, Stephan Olariu. jcit 1990: 402-413 [doi]

Fast Parallel Algorithms for CographsRong Lin, Stephan Olariu. fsttcs 1990: 176-189

On the parallel recognition of some tree-representable graphsRong Lin, Stephan Olariu. spdp 1990: 6-13 [doi]

A Fast Parallel, Algorithm to Recognize, Partitionable GraphsRong Lin, Stephan Olariu. ipl, 36(3):153-157, 1990.

1989

A Classification Approach for Automated Reasoning Systems-A Case Study in Graph TheoryRong Lin. PhD thesis, Old Dominion University, Norfolk, Virginia, USA, 1989. [doi]

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