S. Ramanathan - researchr alias

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Viewing Publication 1 - 22 from 22

2019

2018

Need aspect approval system for procurement of components used for INDIAN satellite programJagadamaba Prasad Singh, S. M. Kattimani, Rakesh Kumar, S. Ramanathan, G. N. V. Prasad. rait 2018: 1-6 [doi]

2010

Towards a Resilience Benchmarking for Home GatewaysS. Ramanathan, C. Lac. ccnc 2009: 1-2 [doi]

2006

A Resilient Telco Grid MiddlewareC. Lac, S. Ramanathan. ISCC 2006: 306-311 [doi]

2000

Reconfigurable Filter Coprocessor Architecture for DSP ApplicationsS. Ramanathan, S. K. Nandy, V. Visvanathan. vlsisp, 26(3):333-359, 2000. [doi]

1999

1997

Low-Power Configurable Processor Array for DLMS Adaptive FilteringS. Ramanathan, V. Visvanathan. vlsid 1997: 198-207 [doi]

A Unified Framework and Algorithm for (T/F/C)DMA Channel Assignment in Wireless NetworksS. Ramanathan. infocom 1997: 900-907

1996

Multicast tree generation in networks with asymmetric linksS. Ramanathan. ton, 4(4):558-568, 1996. [doi]

A Survey of Routing Techniques for Mobile Communications NetworksS. Ramanathan, Martha Steenstrup. monet, 1(2):89-104, 1996.

Editorial: Routing in Mobile Communications NetworksS. Ramanathan, Martha Steenstrup. monet, 1(2):87-88, 1996.

A systolic architecture for LMS adaptive filtering with minimal adaptation delayS. Ramanathan, V. Visvanathan. vlsid 1996: 286-289 [doi]

1995

A modular systolic architecture for delayed least mean squares adaptive filteringV. Visvanathan, S. Ramanathan. vlsid 1995: 332-337 [doi]

1993

A Methodology for Generating Application Specific Tree MultipliersS. Ramanathan, Nibedita Mohanty, V. Visvanathan. vlsid 1993: 176-179

An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response FiltersV. Visvanathan, Nibedita Mohanty, S. Ramanathan. vlsid 1993: 166-171

1990

Rewrite Systems for Protocol Specification and VerificationS. Ramanathan, G. Sivakumar. forte 1991: 79-94

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