Yusuke Nitta - researchr alias

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Viewing Publication 1 - 8 from 8

2011

A 45-nm 37.3 GOPS/W Heterogeneous Multi-Core SOC with 16/32 Bit Instruction-Set General-Purpose CoreOsamu Nishii, Yoichi Yuyama, Masayuki Ito, Yoshikazu Kiyoshige, Yusuke Nitta, Makoto Ishikawa, Tetsuya Yamada, Junichi Miyakoshi, Yasutaka Wada, Keiji Kimura, Hironori Kasahara, Hideo Maejima. ieicet, 94-C(4):663-669, 2011. [doi]

2010

2008

Heterogeneous Multi-Core Architecture That Enables 54x AAC-LC Stereo EncodingHiroaki Shikano, Masaki Ito, Masafumi Onouchi, Takashi Todaka, Takanobu Tsunoda, Tomoyuki Kodama, Kunio Uchiyama, Toshihiko Odaka, Tatsuya Kamei, Ei Nagahama, Manabu Kusaoke, Yusuke Nitta, Yasutaka Wada, Keiji Kimura, Hironori Kasahara. jssc, 43(4):902-910, 2008. [doi]

2007

Embedded SoC Resource Manager to Control Temperature and Data BandwidthMakoto Saen, Kenichi Osada, Satoshi Misaka, Tetsuya Yamada, Yoshitaka Tsujimoto, Yuki Kondo, Tatsuya Kamei, Yutaka Yoshida, Ei Nagahama, Yusuke Nitta, Takayasu Ito, Tadashi Kameyama, Naohiko Irie. isscc 2007: 296-604 [doi]

2006

Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor CoreTetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori. ieicet, 89-C(3):287-294, 2006. [doi]

2005

Low-Power Design of 90-nm SuperH Processor CoreTetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori. iccd 2005: 258-266 [doi]

1998

Design Methodology of a 200MHz Superscalar Microprocessor: SH-4Toshihiro Hattori, Yusuke Nitta, Mitsuho Seki, Susumu Narita, Kunio Uchiyama, Tsuyoshi Takahashi, Ryuichi Satomura. dac 1998: 246-249 [doi]

1993

Generation of a hierarchical representation for graphic patterns based on groupingMasato Soga, Jun'ichi Toyoda, Yusuke Nitta, Takeshi Imanaka, Masuzo Yanagida. scjapan, 24(2):70-87, 1993. [doi]

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