Journal: IEICE Transactions

Volume 94-C, Issue 5

675 -- 0Tamotsu Hashizume. Foreword
676 -- 680Sang-Hyeon Lee, Moonkyung Kim, Byung-ki Cheong, Jooyeon Kim, Jo-Won Lee, Sandip Tiwari. A Single Element Phase Change Memory
681 -- 685Gil Sung Lee, Doo-Hyun Kim, Seongjae Cho, Byung-Gook Park. A New 1T DRAM Cell: Cone Type 1T DRAM Cell
686 -- 692Moon-Sik Seo, Tetsuo Endoh. The Optimum Physical Targets of the 3-Dimensional Vertical FG NAND Flash Memory Cell Arrays with the Extended Sidewall Control Gate (ESCG) Structure
693 -- 698Akira Otake, Keita Yamaguchi, Katsumasa Kamiya, Yasuteru Shigeta, Kenji Shiraishi. An Atomistic Study on Hydrogenation Effects toward Quality Improvement of Program/Erase Cycle of MONOS-Type Memory
699 -- 704Guobin Wei, Yuta Goto, Akio Ohta, Katsunori Makihara, Hideki Murakami, Seiichiro Higashi, Seiichi Miyazaki. Impact of Annealing Ambience on Resistive Switching in Pt/TiO::2::/Pt Structure
705 -- 711Yuto Norifusa, Tetsuo Endoh. Impact of Floating Body Type DRAM with the Vertical MOSFET
712 -- 716Jungwoo Oh, Jeff Huang, Injo Ok, Se-Hoon Lee, Paul D. Kirsch, Raj Jammy, Hi-Deok Lee. High Transport Si/SiGe Heterostructures for CMOS Transistors with Orientation and Strain Enhanced Mobility
717 -- 723Akio Ohta, Daisuke Kanme, Hideki Murakami, Seiichiro Higashi, Seiichi Miyazaki. Characterization of Mg Diffusion into HfO::2::/SiO::2::/Si(100) Stacked Structures and Its Impact on Detect State Densities
724 -- 729Takuya Imamoto, Takeshi Sasaki, Tetsuo Endoh. Evaluation of 1/f Noise Characteristics in High-k/Metal Gate and SiON/Poly-Si Gate MOSFET with 65 nm CMOS Process
730 -- 736Masakazu Muraguchi, Yoko Sakurai, Yukihiro Takada, Shintaro Nomura, Kenji Shiraishi, Mitsuhisa Ikeda, Katsunori Makihara, Seiichi Miyazaki, Yasuteru Shigeta, Tetsuo Endoh. Study on Collective Electron Motion in Si-Nano Dot Floating Gate MOS Capacitor
737 -- 742Masakazu Muraguchi, Tetsuo Endoh. Study on Impurity Distribution Dependence of Electron-Dynamics in Vertical MOSFET
743 -- 750Tetsuo Endoh, Masashi Kamiyanagi, Masakazu Muraguchi, Takuya Imamoto, Takeshi Sasaki. The Impact of Current Controlled-MOS Current Mode Logic/Magnetic Tunnel Junction Hybrid Circuit for Stable and High-Speed Operation
751 -- 759Takeshi Sasaki, Takuya Imamoto, Tetsuo Endoh. Temperature Dependency of Driving Current in High-k/Metal Gate MOSFET and Its Influence on CMOS Inverter Circuit
760 -- 766Masashi Kamiyanagi, Takuya Imamoto, Takeshi Sasaki, Hyoungjun Na, Tetsuo Endoh. Verification of Stable Circuit Operation of 180 nm Current Controlled MOS Current Mode Logic under Threshold Voltage Fluctuation
767 -- 770Young-Uk Song, Hiroshi Ishiwara, Shun'ichiro Ohmi. Investigation of n-Type Pentacene Based MOS Diodes with Ultra-Thin Metal Interface Layer
771 -- 774Seung-Bin Baek, Dae-Hee Kim, Yeong Cheol Kim. Interaction of ::::Bis::::-diethylaminosilane with a Hydroxylized Si (001) Surface for SiO::2:: Thin-Film Growth Using Density Functional Theory
775 -- 779Jun Gao, Jumpei Ishikawa, Shun ichiro Ohmi. Modulation of PtSi Work Function by Alloying with Low Work Function Metal
780 -- 785Won-Young Jung, Jong-Min Kim, Jin-Soo Kim, Taek-Soo Kim. A Precision Floating-Gate Mismatch Measurement Technique for Analog Application
786 -- 790Young-Su Kim, Min Ho Kang, Kang Suk Jeong, Jae Sub Oh, Yu Mi Kim, Dong Eun Yoo, Hi-Deok Lee, Ga-won Lee. Dual-Gate ZnO Thin-Film Transistors with SiNx as Dielectric Layer
791 -- 795Chun-Hyung Cho, Ho-Young Cha. Errors in Pi-Coefficients Due to the Strain Effects in Resistor Stress Sensor on (001) Silicon
796 -- 801Jae Young Park, Dae-Woo Kim, Young-Sang Son, Jong-Kyu Song, Chang-Soo Jang, Won-Young Jung. A Non-snapback ESD Protection Clamp Circuit Using Isolated Parasitic Capacitance in a 0.35 µm Bipolar-CMOS-DMOS Process
802 -- 806Ryoto Yaguchi, Fumiyuki Adachi, Takao Waho. A Dynamic Source-Follower Integrator and Its Application to ΔΣ Modulators
807 -- 813Sungjin Kim, Hyunchul Kim, Dong-hyun Kim, Sanggeun Jeon, Yeocho Yoon, Jae-Sung Rieh. A V-Band Common-Source Low Noise Amplifier in a 0.13 µm RF CMOS Technology and the Effect of Dummy Fills
814 -- 819Masatake Hangai, Kazuhiko Nakahara, Mamiko Yamaguchi, Morishige Hieda. High-Power Protection Switch Using Stub/Line Selectable Circuits
820 -- 825Nobuhiko Tanaka, Mitsufumi Saito, Michihiko Suhara. Analysis of Low Loss and Wideband Characteristics for Lumped Element Isolators Implemented by Using Tunnel Diodes
826 -- 829Jongseung Hwang, Heetae Kim, Jae-Hyun Lee, Dongmok Whang, SungWoo Hwang. Deoxyribonucleic Acid Sensitive Graphene Field-Effect Transistors
830 -- 834Naoaki Takebe, Takashi Kobayashi, Hiroyuki Suzuki, Yasuyuki Miyamoto, Kazuhito Furuya. Fabrication of InP/InGaAs DHBTs with Buried SiO::2:: Wires
835 -- 841Sanna Taking, Douglas Macfarlane, Ali Z. Khokhar, Amir M. Dabiran, Edward Wasige. DC and RF Performance of AlN/GaN MOS-HEMTs
842 -- 845Jae-Gil Lee, Chun-Hyung Cho, Ho-Young Cha. Effects of Field Plate and Buried Gate Structures on Silicon Carbide Metal-Semiconductor Field-Effect Transistors
846 -- 849Hoon-Ki Lee, S. V. Jagadeesh Chandra, Kyu-Hwan Shim, Jong Won Yoon, Chel-Jong Choi. Electrical and Structural Properties of Metal-Oxide-Semiconductor (MOS) Devices with Pt/Ta::2::O::5:: Gate Stacks
850 -- 853Jong-Dae Lee, Hyun-Min Seung, Kyoung-Cheol Kwon, Jea-Gun Park. Dependence of Ag Film Thickness on Ag Nanocrystals Formation to Fabricate Polymer Nonvolatile Memory
854 -- 857Jongsun Kim, Gyungsu Byun, M. Frank Chang. A Low-Overhead and Low-Power RF Transceiver for Short-Distance On- and Off-Chip Interconnects
858 -- 861Bongsub Song, Dohyung Kim, Kwangsoo Kim, Jinwook Burm. A Sub-Harmonic RF Transmitter Architecture with Simultaneous Power Combination and LO Leakage Cancellation
862 -- 864Zhigang Zang, Keisuke Mukai, Paolo Navaretti, Marcus Duelk, Christian Velez, Kiichi Hamamoto. High Power and Stable High Coupling Efficiency (66 ) Superluminescent Light Emitting Diodes by Using Active Multi-Mode Interferometer
865 -- 873Norimasa Nakashima, Mitsuo Tateiba. A Comparative Study on Iterative Progressive Numerical Methods for Boundary Element Analysis of Electromagnetic Multiple Scattering
874 -- 881Koichi Hirayama, Yasuhide Tsuji, Shintaro Yamasaki, Shinji Nishiwaki. Design Optimization of H-Plane Waveguide Component by Level Set Method
882 -- 889Chih-Hao Lu, Ching-Wen Hsue, Bin-Chang Chieu, Hsiu-Wei Liu. Design of Broadband Amplifier Embedded with Band-Pass Filter Using Discrete-Time Technique
890 -- 895Kenji Suzuki, Mamoru Ugajin, Mitsuru Harada. A 5th-Order SC Complex BPF Using Series Capacitances for Low-IF Narrowband Wireless Receivers
896 -- 904Jonghee Hwang, Yongwoo Choi, Yoonsik Choe. Frame Rate Up-Conversion Technique Using Hardware-Efficient Motion Estimator Architecture for Motion Blur Reduction of TFT-LCD
905 -- 908Kyoung-Pyo Ahn, Ryo Ishikawa, Kazuhiko Honjo. UWB Active Balun Design with Small Group Delay Variation and Improved Return Loss
909 -- 912Sung-Sun Choi, Han-Yeol Yu, Yong Hoon Kim. 24 GHz CMOS Frequency Source with Differential Colpitts Structure-Based Complementary VCO for Low Phase Noise
913 -- 916Jinn-Shyan Wang, Yu-Juey Chang, Chingwei Yeh. Design of High-Performance CMOS Level Converters Considering PVT Variations
917 -- 919Jaejun Lee, Sungho Lee, Sangwook Nam. On-Chip Supply Noise Suppression Technique Using Active Inductor