Journal: IEEE Transactions on Computers

Volume 19, Issue 9

783 -- 793Per E. Danielsson. Incremental Curve Generation
793 -- 802David J. Kuck. A Preprocessing High-Speed Memory System
802 -- 808Walter R. Nordquist, Wing N. Toy. A Novel Rotate and Shift Circuit Using Bidirectional Gates
808 -- 812V. Thomas Rhyne. Serial Binary-to-Decimal and Decimal-to-Binary Conversion
812 -- 817Dimitris G. Maritsas, M. G. Hartley. Design Criteria for a Generator of Repeatable Non-Poisson Sequences of Pseudorandom Pulses
818 -- 825Saburo Muroga, Teiichi Tsuboi, Charles R. Baugh. Enumeration of Threshold Functions of Eight Variables
826 -- 829John W. Sammon Jr.. An Optimal Discriminant Plane
830 -- 831John V. Wait. State-Variable Techniques for Digital Simulation of Bandpass Systems
831 -- 837T. Janisz, R. C. Martin. Interconnection of High-Speed Logic Circuits
837 -- 839William H. Kautz. Bypass Switching for Cellular Cascades
839 -- 843Dimitris G. Maritsas, M. G. Hartley. Buffer Length for Erlang Input and Constant Removal Rate
844 -- 847Marvin L. Stein, E. James Mundstock. Sorting Implicit Outputs in Digital Simulation
847 -- 850R. C. White Jr.. A Fast Digital Computer Method for Recursive Estimation of the Mean
850 -- 851Keith W. Henderson. Comment on "Computation of the Fast Walsh-Fourier Transform"
851 -- 0Hans S. Witsenhausen. Hybrid Solution of Partial Differential Equations
854 -- 855Harold S. Stone. B70-4 Theory of Scheduling
855 -- 857Celso de Renna e Souza. B70-5 Theories of Abstract Automata
857 -- 858Eric G. Wagner. R70-32 Tessellation Automata
858 -- 859Dennis Tsichritzis. R70-35 Classes of Automata and Transitive Closure
858 -- 0Azaria Paz. R70-33 Fuzzy Events Realized by Finite Probabilistic Automata
858 -- 0James D. Bargainer. R70-34 Unateness Test of a Boolean Function and Two General Synthesis Methods Using Threshold Logic
859 -- 0James H. Shelly. R70-37 Extensions of Asynchronous Circuits and the Delay Problem I. Good Extensions and the Delay Problem of the First Kind
859 -- 0Stephen T. Hedetniemi. R70-36 Maximin Automata
859 -- 860Karl N. Levitt. R70-38 The Time Required for Group Multiplication

Volume 19, Issue 8

681 -- 692David W. Matula. A Formalization of Floating-Point Numeric Base Conversion
692 -- 701James E. Robertson. The Correspondence Between Methods of Digital Division and Multiplier Recoding Procedures
702 -- 706Michael J. Flynn. On Division by Functional Iteration
706 -- 709Huey Ling. High-Speed Computer Multiplication Using a Multiple-Bit Decoding Algorithm
710 -- 720Gary D. Hornbuckle, Enrico I. Ancona. The LX-1 Microprocessor and Its Application to Real-Time Signal Processing
720 -- 733Daniel E. Atkins. Design of the Arithmetic Units of ILLIAC III: Use of Redundancy and Higher Radix Methods
733 -- 745Algirdas Avizienis, Chin Tung. A Universal Arithmetic Building Element (ABE) and Design Methods for Arithmetic Processors
746 -- 748Chin Tung. Signed-Digit Division Using Combinational Arithmetic Nets
749 -- 751Antonin Svoboda. Adder With Distributed Control
752 -- 757Thammavarapu R. N. Rao, Avtar K. Trehan. Binary Logic for Residue Arithmetic Using Magnitude Index
758 -- 759Richard Brent. On the Addition of Binary Numbers
762 -- 763M. Robert Aaron. B70-3 Analog-to-Digital and Digital-to-Analog Conversion Techniques
763 -- 764Peter Richard Benyon. R70-25 Construction of Multistep Integration Formulas for Simulation Purposes
764 -- 0Michael Yoeli. R70-26 Probabilistic Aspects of Machine Decomposition Theory
764 -- 765Franco P. Preparata. R70-28 A Note on Definite Stochastic Sequential Machines
764 -- 0Samuel Bergman. R70-27 Tree Generating Regular Systems
765 -- 0J. Robert Jump. R70-29 Uniform Synthesis of Sequential Circuits
766 -- 0Yueh-Hsung Su. R70-30 Fuzzy Logic and Its Application to Switching Systems
766 -- 0Abraham Waksman. R-70-31 A Generalized Firing Squad Problem

Volume 19, Issue 7

583 -- 593Israel Gitman, Martin D. Levine. An Algorithm for Detecting Unimodal Fuzzy Sets and Its Application as a Clustering Technique
594 -- 616John W. Sammon Jr.. Interactive Pattern Analysis and Classification
617 -- 627Tsunehiko Kameda, Peter Weiner. On the State Minimization of Nondeterministic Finite Automata
627 -- 640Robert J. Lechner. A Transform Approach to Logic Design
641 -- 644Gary K. Maki, James H. Tracey. State Assignment Selection in Asynchronous Sequential Circuits
645 -- 648Nripendra N. Biswas. On Identification of Totally Symmetric Boolean Functions
649 -- 651Sivaramakrishnan Lakshmivarahan, Mandayam A. L. Thathachar. Pattern Classification Using Stochastic Approximation Techniques
651 -- 653Jorge Santos, Héctor Arango, Manuel Pascual, G. Roing. A Cyclic Algebra for the Synthesis of Ternary Digital Systems
654 -- 0Martin Cohn. 3
656 -- 0Harry C. Andrews. B70-2 Transmission of Information by Orthogonal Functions
657 -- 658Erik D. Goodman. R70-18 Real-Time Computation by n-Dimensional Iterative Arrays of Finite-State Machines
657 -- 0Arthur D. Friedman. R70-17 Asynchronous Sequential Circuits with Feedback
658 -- 659Thomas F. Arnold. R70-21 Time and Tape Complexity of Pushdown Automaton Languages
658 -- 0Monroe M. Newborn. R70-19 Frequency of Decomposability Among Machines with a Large Number of States
658 -- 0John C. Shepherdson. R70-20 Sequential Boolean Equations
659 -- 0James Turner. R70-22 Subdirect Decompositions of Transformation Graphs
659 -- 660Tsunehiko Kameda. R70-23 Multi-Tape and Multi-Head Pushdown Automata
660 -- 0John P. Robinson. R70-24 A Procedure for Selecting Diagnostic Tests

Volume 19, Issue 6

483 -- 486Israel Korn, Anos Nathan. On the Representation of Arbitrary Functions and Their Generation
487 -- 492Daniel Tabak. An Algorithm for Nonlinear Process Stabilization and Control
492 -- 503Daniel P. Bovet, Gerald Estrin. On Static Memory Allocation in Computer Systems
504 -- 509Eugenio Morreale. Recursive Operators for Prime Implicant and Irredundant Normal Form Determination
509 -- 514K. K. Chakrabarti, Arun Kumar Choudhury, M. S. Basu. Complementary Function Approach to the Synthesis of Three-Level NAND Network
515 -- 529Larry L. Kinney. Decomposition of Asynchronous Sequential Switching Circuits
530 -- 534Wesley W. Chu. Buffer Behavior for Poisson Arrivals and Multiple Synchronous Constant Outputs
534 -- 540Leonard Kleinrock. Swap-Time Considerations in Time-Shared Systems
541 -- 546Godfried T. Toussaint, Robert W. Donaldson. Algorithms for Recognizing Contour-Traced Handprinted Characters
546 -- 548A. E. Brenner, Pieter de Bruyne. A Sonic Pen: A Digital Stylus System
548 -- 551Keith L. Doty. On Information-Lossless Discrete-Time Systems
551 -- 558Guney Gonenc. A Method for the Design of Fault Detection Experiments
559 -- 560Raymond Reeves. Comment on "A Transform for Logic Networks"
559 -- 0P. R. Cassee, M. J. O. Strutt. Is There Any Advantage of Ternary Logic as Compared with Binary?
560 -- 0Karl S. Menger Jr.. Author's Reply
563 -- 0Michael A. Arbib. R70-10 The Minimalization of Tree Automata
563 -- 0Eugene L. Lawler. R70-9 A Graph-Theoretic Model for Periodic Discrete Structures
563 -- 564Hisao Yamada. R70-11 Representation of Events in the von Neumann Cellular Model
564 -- 565J. Paul Roth. R70-12 Diagnosis of Single-Gate Failures in Combinational Circuits
565 -- 566Ching Lai Sheng. R70-15 Realization of Sequential Machines with Threshold Elements
565 -- 0W. F. Cutlip. R70-14 Some Results on Cascade Decomposition of Automata
565 -- 0Robert O. Winder. R70-13 Multigate Synthesis of General Boolean Functions by Threshold Logic Elements
566 -- 0Jack Sklansky. R70-16 Unate Cellular Logic

Volume 19, Issue 5

388 -- 398Paul W. Weiler, Richard S. Kopp, Richard G. Dorman. A Real-Time Operating System for Manned Spaceflight
398 -- 402Thammavarapu R. N. Rao. Biresidue Error-Correcting Codes for Computer Arithmetic
403 -- 411Daniel P. Bovet, Gerald Estrin. A Dynamic Memory Allocation Algorithm
412 -- 420Keith L. Doty, Howard Frank. Discrete-Time Systems with the Decomposition Property
421 -- 428Eugenio Morreale. Computational Complexity of Partitioned List Algorithms
429 -- 443Robert E. Lyons. The Synthesis of Redundant Threshold- Logic Elements
444 -- 447Warren Y. Dere, David J. Sakrison. Berkeley Array Processor
447 -- 452Thomas W. Calvert. Nonorthogonal Projections for Feature Extraction in Pattern Recognition
453 -- 456Bostjan Vilfan. An Improved Upper Bound for the Finite Delay of Graphs
456 -- 457Azaria Paz. Regular Events in Stochastic Sequential Machines
458 -- 0Paul T. Hulina, Jon G. Bredeson. On Tracey's Internal State Assignment Method
458 -- 459Jürg Nievergelt. On the Time Required for Timing - The Halting Problem Rephrased
459 -- 0Frank M. Brown. Comment on "The Determination of the Maximum Compatibility Classes"
459 -- 0Arun Kumar Choudhury, A. K. Basu, S. C. De Sarkar. Authors' Reply
462 -- 0Michael A. Harrison. B70-1 Truth Functions and the Problem of Their Realization by Two-Terminal Graphs
463 -- 464Carl V. Page. R70-3 On Stochastic Languages
463 -- 0Juris Hartmanis. R70-1 A Note on Computing Time for the Recognition of Context- Free Languages by a Single-Tape Turing Machine
463 -- 0John E. Hopcroft. R70-2 Nested Stack Automata
464 -- 0Arthur M. Geoffrion. R70-4 Analysis of Algorithms for the Zero-One Programming Problem
464 -- 465Gil Grado. R70-5 The Effect of IC's on the Design of Analog Computers
465 -- 0Walter J. Karplus. R70-6 Use of Functional Approximation Methods in the Computer Solution of Initial Value Partial Differential Equation Problems
465 -- 0Maxwell C. Gilliland. R70-7 Stability Controls for the Analysis of Analog/Digital Hybrid Loops
465 -- 466Peter C. Young. R70-8 Analog Methods for On-Line System Identification Using Noisy Measurements

Volume 19, Issue 4

291 -- 303Kenneth J. Thurber, John W. Myrna. System Design of a Cellular APL Computer
304 -- 310James R. Slagle, Chin-Liang Chang, Richard C. T. Lee. A New Algorithm for Generating Prime Implicants
311 -- 318Keinosuke Fukunaga, Warren L. G. Koontz. Application of the Karhunen-Loève Expansion to Feature Selection and Ordering
319 -- 341Thomas A. Slivinski. An Extension of Threshold Logic
342 -- 348Jehuda Kella. State Minimization of Incompletely Specified Sequential Machines
349 -- 353Robert O. Winder. Threshold Logic Asymptotes
353 -- 355Wayne A. Davis. Sequential Machines Realizable with Delay Elements Only
355 -- 358George C. Sethares. Completely Periodic Multithreshold Functions
359 -- 0John M. Mage. Application of Iterative Consensus to Multiple-Output Functions
359 -- 360L. J. Ulman. Computation of the Hadamard Transform and the R- Transform in Ordered Form
360 -- 361Abraham Waksman. On Winograd's Algorithm for Inner Products
362 -- 363Guy W. Beakley, Franz B. Tuteur. 1
363 -- 364Ernest G. Henrichon Jr., King-sun Fu. 5

Volume 19, Issue 3

197 -- 205Edward A. Patrick, Joseph Peter Costello, Fabian C. Monds. Decision-Directed Estimation of a Two-Class Decision Boundary
205 -- 213Philippe P. Loutrel. A Solution to the Hidden-Line Problem for Computer-Drawn Polyhedra
213 -- 222Robert W. Cook, Michael J. Flynn. System Design of a Dynamic Microprocessor
222 -- 226Shalhav Zohar. Negative Radix Conversion
227 -- 231E. V. Krishnamurthy. On Optimal Ierative Schemes for High-Speed Division
232 -- 238Jan Hlavicka. Essential Hazard Correction Without the Use of Delay Elements
239 -- 248V. Yun-Shen Shen, Archie C. McKellar. An Algorithm for the Disjunctive Decomposition of Switching Functions
249 -- 254Richard Y. Kain. Nonlinear Sequential Circuits
254 -- 258Yahiko Kambayashi, Shuzo Yajima, Isao Ohbayashi. On Finite-Memory Sequential Machines
259 -- 262Stephen S. Yau, M. Orsic. Fault Diagnosis and Repair of Cutpoint Cellular Arrays
262 -- 269Daniel L. Ostapko, Stephen S. Yau. Realization of an Arbitrary Switching Function with a Two-Level Network of Threshold and Parity Elements
270 -- 272Mark M. Rochkind. Transferable FORTRAN Subroutine for Rapid Extended Sorting

Volume 19, Issue 2

97 -- 105Ernest L. Hall, David D. Lynch, Samuel J. Dwyer III. Generation of Products and Quotients Using Approximate Binary Logarithms for Digital Filtering Applications
105 -- 116Jeffery A. Glassman. A Generalization of the Fast Fourier Transform
116 -- 124Herschel H. Loomis Jr.. A Scheme for Synchronizing High-Speed Logic Part II
124 -- 131Peter H. Mengert. Solution of Linear Inequalities
132 -- 140Amar Mukhopadhyay, Greg Schmitz. Minimization of Exclusive or and Logical Equivalence Switching Circuits
141 -- 149Stephen S. Yau, Calvin K. Tang. Universal Logic Modules and Their Applications
149 -- 153Granino A. Korn, Hideo Kosako. A Proposed Hybrid-Computer Method for Functional Optimization
153 -- 157Ali Habibi, Paul A. Wintz. Fast Multipliers
157 -- 160E. V. Krishnamurthy. On Range-Transformation Techniques for Division
160 -- 162Iain D. G. Macleod. Pictorial Output with a Line Printer
162 -- 164William H. Kautz. The Necessity of Closed Circuit Loops in Minimal Combinational Circuits
164 -- 166T. T. Nieh. On the Uniqueness of Minimal-State Stochastic Sequential Machines
166 -- 167Kannan K. Nambiar. Solution to Harrison's Problem
167 -- 169B. G. Reynolds. General Repetitive Events and Machines
169 -- 173Robert M. Bowman, Eugene S. McVey. A Method for the Fast Approximate Solution of Large Prime Implicant Charts
173 -- 174Sureshchander. Comments on "The Synthesis of Binary Sequence Detectors"
174 -- 0Robert J. Lechner. 1

Volume 19, Issue 12

1139 -- 1145Michel Y. L., Depeyrot. Linear System Identification Using Real-Time Deconvolution
1146 -- 1152James R. Heath, Chester C. Carroll. Special-Purpose Computer Organization for Double-Precision Realization of Digital Filters
1153 -- 1159Hugh J. Beuscher, Wing N. Toy. Check Schemes for Integrated Microprogrammed Control and Data Transfer Circuitry
1160 -- 1173Edward P. Stabler. System Description Languages
1174 -- 1181Mitsuhito Sakaguchi, Nobuo Nishida, Tadao Nemoto. A New Associative Memory System Utilizing Holography
1181 -- 1192Iwao Morishita. Analysis of an Adaptive Threshold Logic Unit
1193 -- 1203Taylor L. Booth. Estimation, Prediction, and Smoothing in Discrete Parameter Systems
1204 -- 1209Abraham Lempel. On a Homomorphism of the de Bruijn Graph and its Applications to the Design of Feedback Shift Registers
1210 -- 1213Herschell F. Murry. A General Approach for Generating Natural Random Variables
1214 -- 1216Robert M. Storwick. Improved Construction Techniques for (d, k) Graphs
1216 -- 1221Raymond R. Olson. Note on Feedforward Inverses for Linear Sequential Circuits
1221 -- 1222Kripasindhu Sikdar. Determination of Multipliers Mapping an Arbitrary Integer into a Range of Certain Type
1222 -- 1223Carl V. Page. The Search for a Definition of Partition Pair for Stochastic Automata
1223 -- 1225Rangaswamy V. Setlur. A Method to Determine the Expressive Power of a Set of Connectives
1225 -- 1226Abraham Waksman. On the Complexity of Inversions

Volume 19, Issue 11

1009 -- 1015Mary Allen Wilkes. Scroll Editing: An On-Line Algorithm for Manipulating Long Character Strings
1015 -- 1019Herbert L. Groginsky, George A. Works. A Pipeline Fast Fourier Transform
1020 -- 1028George V. Podraza, Roland S. Gregg Jr., James R. Slager. Efficient MSI Partitioning for a Digital Computer
1029 -- 1035Marvin Perlman. The Decomposition of the States of a Linear Feedback Shift Register Into Cycles of Equal Length
1035 -- 1038Irving S. Reed, Albert C. L. Chiang. Coding Techniques for Failure-Tolerant Counters
1038 -- 1046Melvin A. Breuer. Functional Partitioning and Simulation of Digital Circuits
1047 -- 1054Chin Tung. On the Apparent Continuity of Processing in a Paging Environment
1055 -- 1063David B. Cooper, John H. Freeman. On the Asymptotic Improvement in the Out- come of Supervised Learning Provided by Additional Nonsupervised Learning
1063 -- 1073Charles R. Kime. An Analysis Model for Digital System Diagnosis
1073 -- 1078Arthur Gill. Single-Channel and Multichannel Finite-State Machines
1079 -- 1085Shin ichi Murakami, Kozo Kinoshita, Hiroshi Ozaki. Sequential Machines Capable of Fault Diagnosis
1085 -- 1089B. J. Austin. Use of a Macro Processor in Logical Design
1089 -- 1090Michael Yoeli. The Synthesis of Multivalued Cellular Cascades
1091 -- 1095Donald F. Dinn, David A. Winter, Brian G. Trenholm. CINTEL - Computer Interface for Television
1096 -- 1099Robert W. Donaldson, Godfried T. Toussaint. Use of Contextual Constraints in Recognition of Contour-Traced Handprinted Characters
1099 -- 1105Eugenio Morreale, Massimo Mennucci. Computer Experience on Partitioned List Algorithms
1105 -- 1108Giuseppe Gestri. Synthesis of Multiple Sequential Machines Having Different Inputs
1108 -- 1111Robert W. House, D. W. Stevens. A New Rule for Reducing CC Tables
1111 -- 1114Antonio Grasselli, Ugo Montanari. On the Minimization of READ-ONLY Memories in Microprogrammed Digital Computers
1114 -- 1118J. F. Sherlock. The Simulation of a Multicomputer System
1118 -- 1120Sureshchander. RST Flip-Flop Input Equations

Volume 19, Issue 10

879 -- 889Wei Lai Chen, Lawrence P. McNamee. Iterative Solution of Large-Scale Systems by Hybrid Techniques
889 -- 895Garold S. Tjaden, Michael J. Flynn. Detection and Parallel Execution of Independent Instructions
896 -- 902Vinod Batra. Design of Asynchronous Unit Delays
902 -- 907Helmut Berndt. Functional Microprogramming as a Logic Design Aid
908 -- 916Edward P. Stabler. Microprogram Transformations
917 -- 923Keinosuke Fukunaga, Warren L. G. Koontz. A Criterion and an Algorithm for Grouping Data
924 -- 938Dimitris G. Maritsas, M. G. Hartley. A Case Study of a Versatile Generator of Repeatable Non-Poisson Sequences of Pseudorandom Pulses
939 -- 956Boris Beizer. Towards a New Theory of Sequential Switching Networks
956 -- 963Patrick J. Marino. A Linear Decomposition for Sequential Machines
964 -- 971Zvonko G. Vranesic, E. Stewart Lee, Kenneth C. Smith. A Many-Valued Algebra for Switching Systems
972 -- 975William H. Kautz. A Readily Implemented Single-Error-Correcting Unit-Distance Counting Code
975 -- 976Jorge Santos, Héctor Arango. A Graphic Method for the Synthesis of Threshold Ternary Functions
976 -- 981Frank M. Brown. Reduced Solutions of Boolean Equations
982 -- 0D. P. Burton, M. C. Waters. Comment on "Delay-Free Asynchronous Circuits with Constrained Line Delays"
982 -- 983Edward S. Deutsch. On Parallel Operations on Hexagonal Arrays
983 -- 0Akio Sasaki, Sadahisa Watanabe. 1
986 -- 0Daniel Tabak. B70-6 Computing Methods in Optimization Problems
987 -- 0Tsunehiko Kameda. R70-39 On the Relational Homomorphisms of Automata
987 -- 988Sheldon B. Akers Jr.. R70-40 Module Clustering to Minimize Delay in Digital Networks
988 -- 989Herbert Y. Chang. R70-41 Diagnosis and Utilization of Faulty Universal Tree Circuits
989 -- 990Janusz A. Brzozowski. R70-44 Synchronization and General Repetitive Machines, with Applications to Ultimate Definite Automata
989 -- 0Wayne A. Davis. R70-42 Synthesis of Linear Sequential Machines with Unspecified Outputs
989 -- 0Raymond T. Yeh. R70-43 Lattice Functions, Pair Algebras, and Finite-State Machines
990 -- 0Azaria Paz. R70-45 On Decompositions of Regular Events

Volume 19, Issue 1

1 -- 9Robert B. McGhee, Ragnar N. Nilsen. The Extended Resolution Digital Differential Analyzer: A New Computing Structure for Solving Differential Equations
10 -- 16Dorothea M. Bohling, Lawrence A. O'Neill. An Interactive Computer Approach to Tolerance Analysis
16 -- 25Harry C. Andrews, Kenneth L. Caspari. A Generalized Technique for Spectral Analysis
25 -- 33Akio Sasaki, Sadahisa Watanabe. Computer Simulation of Pulse Propagation Through a Periodic Loaded Transmission Line
34 -- 38Terry G. Gaddess. An Error-Detecting Binary Adder: A Hardware-Shared Implementation
39 -- 47Herschel H. Loomis Jr., Michael R. McCoy. A Scheme for Synchronizing High-Speed Logic: Part I
47 -- 53Harold S. Stone. The Organization of High-Speed Memory for Parallel Block Transfer of Data
54 -- 66Thomas F. Arnold, Chung-Jen Tan, Monroe M. Newborn. Iteratively Realized Sequential Circuits
66 -- 73H. Allen Curtis. Systematic Procedures for Realizing Synchronous Sequential Machines Using Flip-Flop Memory: Part II
73 -- 78Harold S. Stone. A Logic-in-Memory Computer
78 -- 79Ioan Tomescu. A Modified Matrix Algorithm for Determining the Complete Connection Matrix of a Switching Network
79 -- 80John Barratt Moore, K. T. Clark. A Simple Convergent Algorithm for Rapid Solution of Polynomial Equations
80 -- 81Arnold S. Farber, Eugene S. Schlig. Mathematical "Lower Bounds" and the Logic Circuit Designer