| 1239 | -- | 1252 | Huanyu Wang, Qihang Shi, Domenic Forte, Mark M. Tehranipoor. Probing Assessment Framework and Evaluation of Antiprobing Solutions |
| 1253 | -- | 1261 | Ahish Shylendra, Swarup Bhunia, Amit Ranjan Trivedi. An Intrinsic and Database-Free Authentication by Exploiting Process Variation in Back-End Capacitors |
| 1262 | -- | 1275 | Shrinidhi Udupi, Joakim Urdahl, Dominik Stoffel, Wolfgang Kunz. Exploiting Hardware Unobservability for Low-Power Design and Safety Analysis in Formal Verification-Driven Design Flows |
| 1276 | -- | 1283 | Tianwen Li, Hongjin Liu, Haigang Yang. Design and Characterization of SEU Hardened Circuits for SRAM-Based FPGA |
| 1284 | -- | 1297 | Jakub Siast, Adam Luczak, Marek Domanski. RingNet: A Memory-Oriented Network-On-Chip Designed for FPGA |
| 1298 | -- | 1307 | Inayat Ullah, Zahid Ullah, Umar Afzaal, Jeong-A Lee. DURE: An Energy- and Resource-Efficient TCAM Architecture for FPGAs With Dynamic Updates |
| 1308 | -- | 1321 | Daniel Kraak, Mottaqiallah Taouil, Innocent Agbo, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor. Parametric and Functional Degradation Analysis of Complete 14-nm FinFET SRAM |
| 1322 | -- | 1328 | Jeetendra Singh, Balwinder Raj. Design and Investigation of 7T2M-NVSRAM With Enhanced Stability and Temperature Impact on Store/Restore Energy |
| 1329 | -- | 1342 | Nour Sayed, Rajendra Bishnoi, Mehdi Baradaran Tahoori. Fast and Reliable STT-MRAM Using Nonuniform and Adaptive Error Detecting and Correcting Scheme |
| 1343 | -- | 1352 | Gyuseong Kang, Jongsun Park 0001. Charge-Recycling-Based Redundant Write Prevention Technique for Low-Power SOT-MRAM |
| 1353 | -- | 1364 | Anindita Paul, Jaime Ramírez-Angulo, Antonio Torralba 0002. Analysis, Comparison, and Experimental Validation of a Class AB Voltage Follower With Enhanced Bandwidth and Slew Rate |
| 1365 | -- | 1377 | Baibhab Chatterjee, Priyadarshini Panda, Shovan Maity, Ayan Biswas, Kaushik Roy 0001, Shreyas Sen. Exploiting Inherent Error Resiliency of Deep Neural Networks to Achieve Extreme Energy Efficiency Through Mixed-Signal Neurons |
| 1378 | -- | 1389 | Xu Meng, Lianhong Zhou, Fujiang Lin, Chun-Huat Heng. A Low-Noise Digital-to-Frequency Converter Based on Injection-Locked Ring Oscillator and Rotated Phase Selection for Fractional- $N$ Frequency Synthesis |
| 1390 | -- | 1403 | Song-Nien Tang, Fu-Chiang Jan. Energy-Efficient and Calibration-Aware Fourier-Domain OCT Imaging Processor |
| 1404 | -- | 1415 | Eduardo Weber Wächter, Cedric de Bellefroid, Basireddy Karunakar Reddy, Amit Kumar Singh, Bashir M. Al-Hashimi, Geoff V. Merrett. Predictive Thermal Management for Energy-Efficient Execution of Concurrent Applications on Heterogeneous Multicores |
| 1416 | -- | 1427 | Yao Xiao, Shahin Nazarian, Paul Bogdan. Self-Optimizing and Self-Programming Computing Systems: A Combined Compiler, Complex Networks, and Machine Learning Approach |
| 1428 | -- | 1437 | Irith Pomeranz. Extracting a Close-to-Minimum Multicycle Functional Broadside Test Set From a Functional Test Sequence |
| 1438 | -- | 1449 | P. R. Chithira, Vinita Vasudevan. Potential Critical Path Selection Based on a Time-Varying Statistical Timing Analysis Framework |
| 1450 | -- | 1454 | Ding-Yuan Lee, Ching-Che Wang, An-Yeu Wu. Bundle-Updatable SRAM-Based TCAM Design for OpenFlow-Compliant Packet Processor |
| 1455 | -- | 1459 | Suhong Moon, Kwanghyun Shin, Dongsuk Jeon. Enhancing Reliability of Analog Neural Network Processors |
| 1460 | -- | 1464 | Georgios Zervakis, Konstantina Koliogeorgi, Dimitrios Anagnostos, Nikolaos Zompakis, Kostas Siozios. VADER: Voltage-Driven Netlist Pruning for Cross-Layer Approximate Arithmetic Circuits |
| 1465 | -- | 1469 | Muhammad Avais Qureshi, Hyeonggyu Kim, Soontae Kim. A Restore-Free Mode for MLC STT-RAM Caches |
| 1470 | -- | 1474 | Liang Wen, Yuejun Zhang, Xiaoyang Zeng. Column-Selection-Enabled 10T SRAM Utilizing Shared Diff-VDD Write and Dropped-VDD Read for Power Reduction |
| 1475 | -- | 1479 | Shao-I Chu, Chen-En Hsieh, Yu-Jung Huang. Design of FSM-Based Function With Reduced Number of States in Integral Stochastic Computing |
| 1480 | -- | 1484 | Tejinder Singh Sandhu, Kamal El-Sankary. Supply-Insensitive Digitally Controlled Delay Lines for 3-D IC Clock Synchronization Architectures |