| 1485 | -- | 0 | Massimo Alioto. Editorial: TVLSI Keynote Papers Enriching Our Transactions With Invited Contributions |
| 1486 | -- | 1503 | Giovanni V. Resta, Alessandra Leonhardt, Yashwanth Balaji, Stefan De Gendt, Pierre-Emmanuel Gaillardon, Giovanni De Micheli. Devices and Circuits Using Novel 2-D Materials: A Perspective for Future VLSI Systems |
| 1504 | -- | 1512 | Hasan Ulusan, Salar Chamanian, Bedirhan Ilik, Ali Muhtaroglu, Haluk Külah. Fully Implantable Cochlear Implant Interface Electronics With 51.2- $\mu$ W Front-End Circuit |
| 1513 | -- | 1526 | Yuan Liang, Chirn Chye Boon, Chenyang Li, Xiao-Lan Tang, Herman Jalli Ng, Dietmar Kissinger, Yong Wang, Qingfeng Zhang, Hao Yu. Design and Analysis of $D$ -Band On-Chip Modulator and Signal Source Based on Split-Ring Resonator |
| 1527 | -- | 1536 | Jeng-Han Tsai. Design of a 5.3-GHz 31.3-dBm Fully Integrated CMOS Power Amplifier Using Folded Splitting and Combining Architecture |
| 1537 | -- | 1547 | Anil Kumar Gundu, Volkan Kursun. Low Leakage Clock Tree With Dual-Threshold- Voltage Split Input-Output Repeaters |
| 1548 | -- | 1560 | Christopher Williams 0003, Diaaeldin Abdelrahman, Xiangdong Jia, Abdullah Ibn Abbas, Odile Liboiron-Ladouceur, Glenn E. R. Cowan. Reconfiguration in Source-Synchronous Receivers for Short-Reach Parallel Optical Links |
| 1561 | -- | 1574 | Luong N. Nguyen, Chia-Lin Cheng, Milos Prvulovic, Alenka G. Zajic. Creating a Backscattering Side Channel to Enable Detection of Dormant Hardware Trojans |
| 1575 | -- | 1586 | Uthman Alsaiari, Fayez Gebali. Hardware Trojan Detection Using Reconfigurable Assertion Checkers |
| 1587 | -- | 1600 | Debapriya Basu Roy, Debdeep Mukhopadhyay. High-Speed Implementation of ECC Scalar Multiplication in GF(p) for Generic Montgomery Curves |
| 1601 | -- | 1613 | Amin Norollah, Danesh Derafshi, Hakem Beitollahi, Mahdi Fazeli. RTHS: A Low-Cost High-Performance Real-Time Hardware Sorter, Using a Multidimensional Sorting Algorithm |
| 1614 | -- | 1622 | Jeng-Shyang Pan, Chiou-Yng Lee, Anissa Sghaier, Zeghid Medien, Jiafeng Xie. Novel Systolization of Subquadratic Space Complexity Multipliers Based on Toeplitz Matrix-Vector Product Approach |
| 1623 | -- | 1632 | Shirshendu Roy, Debiprasad Priyabrata Acharya, Ajit Kumar Sahoo. Low-Complexity Architecture of Orthogonal Matching Pursuit Based on QR Decomposition |
| 1633 | -- | 1639 | Somayeh Rahimipour, Runjie Zhang, Ke Wang 0011, Kevin Skadron, Fakhrul Zaman Rokhani, Mircea R. Stan. MTTF Enhancement Power-C4 Bump Placement Optimization |
| 1640 | -- | 1651 | Dae-Hyun Kim, Shu-Han Hsu, Linda Milor. Optimization of Experimental Designs for System- Level Accelerated Life Test in a Memory System Degraded by Time-Dependent Dielectric Breakdown |
| 1652 | -- | 1665 | Sami Salamin, Victor M. van Santen, Hussam Amrouch, Narendra Parihar, Souvik Mahapatra, Jörg Henkel. Modeling the Interdependences Between Voltage Fluctuation and BTI Aging |
| 1666 | -- | 1674 | Zeyu Sun, Sheriff Sadiqbatcha, Hengyang Zhao, Sheldon X.-D. Tan. Saturation-Volume Estimation for Multisegment Copper Interconnect Wires |
| 1675 | -- | 1684 | Nezam Rohbani, Hiroaki Gau, Sara Mohammadinejad, Tapas Kumar Maiti, Dondee Navarro, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Hirotaka Takatsuka. Power Reduction and BTI Mitigation of Data-Cache Memory Based on the Storage Management of Narrow-Width Values |
| 1685 | -- | 1696 | Govind Radhakrishnan, Youngki Yoon, Manoj Sachdev. A Parametric DFT Scheme for STT-MRAMs |
| 1697 | -- | 1710 | Sarath Mohanachandran Nair, Rajendra Bishnoi, Mehdi Baradaran Tahoori. A Comprehensive Framework for Parametric Failure Modeling and Yield Analysis of STT-MRAM |
| 1711 | -- | 1719 | Fabrizio Riente, Daniel Melis, Marco Vacca. Exploring the 3-D Integrability of Perpendicular Nanomagnet Logic Technology |
| 1720 | -- | 1724 | Irith Pomeranz. Test Scores for Improving the Accuracy of Logic Diagnosis for Multiple Defects |
| 1725 | -- | 1729 | Yi-An Chang, Shen-Iuan Liu. A 13.4-MHz Relaxation Oscillator With Temperature Compensation |