The following publications are possibly variants of this publication:
- A 1.3-GHz fifth-generation SPARC64 microprocessorHisashige Ando, Yuuji Yoshida, Aiichiro Inoue, Itsumi Sugiyama, Takeo Asakawa, Kuniki Morita, Toshiyuki Muta, Tsuyoshi Motokurumada, Seishi Okada, Hideo Yamashita, Yoshihiko Satsukawa, Akihiko Konmoto, Ryouichi Yamashita, Hiroyuki Sugiyama. jssc, 38(11):1896-1905, 2003. [doi]
- A Physical Design Methodology for 1.3GHz SPARC64 MicroprocessorNoriyuki Ito, Hiroaki Komatsu, Yoshiyasu Tanamura, Ryoichi Yamashita, Hiroyuki Sugiyama, Yaroku Sugiyama, Hirofumi Hamamura. iccd 2003: 204-210 [doi]
- Delay defect screening for a 2.16GHz SPARC64 microprocessorNoriyuki Ito, Akira Kanuma, Daisuke Maruyama, Hitoshi Yamanaka, Tsuyoshi Mochizuki, Osamu Sugawara, Chihiro Endoh, Masahiro Yanagida, Takeshi Kono, Yutaka Isoda, Kazunobu Adachi, Takahisa Hiraide, Shigeru Nagasawa, Yaroku Sugiyama, Eizo Ninoi. aspdac 2006: 342-347 [doi]
- SPARC64™ XIfx: Fujitsu's next generation processor for HPCToshio Yoshida. hotchips 2014: 1-31 [doi]
- Validation of hardware error recovery mechanisms for the SPARC64 V microprocessorHisashige Ando, Ryuji Kan, Yoshiharu Tosaka, Keiji Takahisa, Kichiji Hatanaka. dsn 2008: 62-69 [doi]
- Detection of multiple transitions in delay fault test of SPARC64 microprocessorDaisuke Maruyama, Akira Kanuma, Takashi Mochiyama, Hiroaki Komatsu, Yaroku Sugiyama, Noriyuki Ito. iccad 2004: 893-898 [doi]