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Kuang-Chien Chen, Jason Cong, Yuzheng Ding, Andrew B. Kahng, Peter Trajmar. DAG-Map: Graph-Based FPGA Technology Mapping for Delay Optimization. IEEE Design & Test of Computers, 9(3):7-20, 1992. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: On Nominal Delay Minimization in LUT-based FPGA Technology MappingJason Cong, Yuzheng Ding. fpga 1995: 82-88 [doi] Technology mapping for k/m-macrocell based FPGAsJason Cong, Hui Huang, Xin Yuan. fpga 2000: 51-59 [doi] Mapping for better than worst-case delays in LUT-based FPGA designsKirill Minkovich, Jason Cong. fpga 2008: 56-64 [doi] LUT-based FPGA technology mapping for reliability (abstract only)Jason Cong, Kirill Minkovich. fpga 2010: 288 [doi] An Improved Graph-Based FPGA Techology Mapping Algorithm For Delay OptimizationJason Cong, Yuzheng Ding, Andrew B. Kahng, Peter Trajmar, Kuang-Chien Chen. iccd 1992: 154-158
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