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Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi. A 11-Transistor Nanoscale CMOS Memory Cell for Hardening to Soft Errors. IEEE Trans. VLSI Syst., 19(5):900-904, 2011. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Soft-Error Hardening Designs of Nanoscale CMOS LatchesSheng Lin, Yong-Bin Kim, Fabrizio Lombardi. vts 2009: 41-46 [doi] A Novel Hardened Design of a CMOS Memory Cell at 32nmSheng Lin, Yong-Bin Kim, Fabrizio Lombardi. dft 2009: 58-64 [doi]
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