Researchr is a web site for finding, collecting, sharing, and reviewing scientific publications, for researchers by researchers.
Sign up for an account to create a profile with publication list, tag and review your related work, and share bibliographies with your co-authors.
Hiroshi Makino, Yasunobu Nakase, Hiroaki Suzuki, Hiroyuki Morinaka, Hirofumi Shinohara, Koichiro Mashiko. An 8.8-ns 54×54-bit multiplier with high speed redundant binary architecture. J. Solid-State Circuits, 31(6):773-783, 1996. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A 8.8-ns 54 54-Bit Multiplier Using New Redundant Binary ArchitectureHiroshi Makino, Yasunobu Nakase, Hirofumi Shinohara. iccd 1993: 202-205
The following publications are possibly variants of this publication: