The following publications are possibly variants of this publication:
- Synthesizable FPGA fabrics targetable by the Verilog-to-Routing (VTR) CAD flowJin-Hee Kim, Jason H. Anderson. fpl 2015: 1-8 [doi]
- Improved language support for Verilog elaboration in Odin II and FPGA architecture benchmarking in the VTR CAD toolBipin Kumar Badri Narayanan, Lucas Cambuim, Konstantin Nasartschuk, Kenneth B. Kent, Paul G. Ploeger. pacrim 2015: 309-314 [doi]
- Improving FPGA Routing Architectures Using Architecture and CAD InteractionsBenjamin Tseng, Jonathan Rose, Stephen Dean Brown. iccd 1992: 99-104
- Visual exploration of changing FPGA architectures in the VTR projectKonstantin Nasartschuk, Rainer Herpers, Kenneth B. Kent. rsp 2013: 16-22 [doi]
- VTR 8: High-performance CAD and Customizable FPGA Architecture ModellingKevin E. Murray, Oleg Petelin, Sheng Zhong, Jia-Min Wang, Mohamed Eldafrawy, Jean-Philippe Legault, Eugene Sha, Aaron Graham, Jean Wu, Matthew J. P. Walker, Hanqing Zeng, Panagiotis Patros, Jason Luu, Kenneth B. Kent, Vaughn Betz. trets, 13(2), 2020. [doi]
- System-on-chip processor using different FPGA architectures in the VTR CAD flowJingjing Li, Konstantin Nasartschuk, Kenneth B. Kent. rsp 2014: 72-77 [doi]
- VTR 7.0: Next Generation Architecture and CAD System for FPGAsJason Luu, Jeffrey Goeders, Michael Wainberg, Andrew Somerville, Thien Yu, Konstantin Nasartschuk, Miad Nasr, Sen Wang, Tim Liu, Nooruddin Ahmed, Kenneth B. Kent, Jason Anderson, Jonathan Rose, Vaughn Betz. trets, 7(2):6, 2014. [doi]
- VPR 5.0: FPGA cad and architecture exploration tools with single-driver routing, heterogeneity and process scalingJason Luu, Ian Kuon, Peter Jamieson, Ted Campbell, Andy Ye, Wei Mark Fang, Jonathan Rose. fpga 2009: 133-142 [doi]
- Automatic generation of FPGA routing architectures from high-level descriptionsVaughn Betz, Jonathan Rose. fpga 2000: 175-184 [doi]