Table of Contents

• Thermal-driven 3D floorplanning using localized TSV placementPuskar Budhathoki, Andreas Henschel, Ibrahim Abe M. Elfadel. 1-4 [doi]
• A 10 Gbps loss of signal detector for high-speed AC-coupled serial transceivers in 28nm CMOS technologySanad Kawar, Khaldoon Abugharbieh, Waseem Al-Akel, Mahmood Mohammed. 1-4 [doi]
• Random telegraph noise as a new measure of plasma-induced charging damage in MOSFETsMasayuki Kamei, Yoshinori Takao, Koji Eriguchi, Kouichi Ono. 1-4 [doi]
• Assessing device reliability through atomic-level modeling of material characteristicsGennadi Bersuker. 1-3 [doi]
• Mobile CPU power/performance benchmarking and process technology co-optimizationR. Bucki, T. Bridges, B. Bowers, T. Xue, I. Mir, D. Le, T. Kazi, J. Fischer, S. Ekbote, S. Sengupta, G. Nallapati. 1-4 [doi]
• A solar-powered 280mV-to-1.2V wide-operating-range IA-32 processorSriram R. Vangal, Shailendra Jain, Vivek De. 1-4 [doi]
• A brief introduction on contemporary High-Level SynthesisHaoxing Ren. 1-4 [doi]
• Bio-integrated electronicsNanshu Lu, Pulin Wang. 1-5 [doi]
• 32% Slew rate and 27% data rate improved 2×VDD output buffer using PVTL compensationTzung-Je Lee, Kai-Wei Ruan, Chua-Chin Wang. 1-4 [doi]
• 3D serial TSV link for low-power chip-to-chip communicationGiulia Beanato, Alessandro Cevrero, Giovanni De Micheli, Yusuf Leblebici. 1-4 [doi]
• ALD Ta2O5 and Hf-doped Ta2O5 for BEOL compatible MIMD. H. Triyoso, W. Weinreich, K. Seidell, M. G. Nolan, P. Polakowski, D. Utess, S. Ohsiek, K. Dittmar, M. Weisheit, M. Licbau, R. Fox. 1-4 [doi]
• Understanding timing impact of BTI/RTN with massively threaded atomistic transient simulationsDimitrios Rodopoulos, Dimitrios Stamoulis, Grigorios Lyras, Dimitrios Soudris, Francky Catthoor. 1-4 [doi]
• Variability of planar Ultra-Thin Body and Buried oxide (UTBB) FDSOI MOSFETsJ. Mazurier, Olivier Weber, François Andrieu, Cyrille Le Royer, Olivier Faynot, Maud Vinet. 1-4 [doi]
• Robust low-power reconfigurable computing with a variation-aware preferential design approachSomnath Paul, Saibal Mukhopadhyay, Swarup Bhunia. 1-6 [doi]
• Characterization and modeling of charge trapping: From single defects to devicesTibor Grasser, G. Rzepa, Michael Waltl, Wolfgang Gös, Karina Rott, Gunnar Andreas Rott, Hans Reisinger, Jacopo Franco, Ben Kaczer. 1-4 [doi]
• Testing, diagnosis and repair methods for NBTI-induced SRAM faultsBao Liu, Chiung-Hung Chen. 1-4 [doi]
• Metallization of a polymer substrate for microfluidic-cooled RF laminatesStephen Long, W. Mark Dorsey, Andre A. Adams, Greg Huff. 1-4 [doi]
• A comparative analysis of 3D-IC partitioning schemes for asynchronous circuitsLandon Caley, Chien-Wei Lo, Francis Sabado, Jia Di. 1-4 [doi]
• A high-level design rule library addressing CMOS and heterogeneous technologiesGerald Cibrario, Marjorie Gary, Fabien Gays, Karim Azizi-Mourier, Olivier Billoint, Ogun Turkyilmaz, Olivier Rozeau. 1-4 [doi]
• High-performance stacked TiO2-ZrO2 and Si-doped ZrO2 metal-insulator-metal capacitorsRevathy Padmanabhan, Navakanta Bhat, Yuichiro Morozumi, S. Mohan, Sanjeev Kaushal. 1-4 [doi]
• Pathfinder3D: A framework for exploring early thermal tradeoffs in 3DICShivam Priyadarshi, W. Rhett Davis, Paul D. Franzon. 1-6 [doi]
• Workload prediction for adaptive power scaling using deep learningStephen J. Tarsa, Amit P. Kumar, H. T. Kung. 1-5 [doi]
• A new aspect of plasma-induced physical damage in three-dimensional scaled structures - Sidewall damage by stochastic straggling and sputteringKoji Eriguchi, Yoshinori Takao, Kouichi Ono. 1-5 [doi]
• New modular bi-directional power-switch and self ESD protected in 28nm UTBB FDSOI advanced CMOS technologyPhilippe Galy, J. Bourgeat, D. Marin-Cudraz. 1-4 [doi]
• Efficient computation of combinational circuits reliability based on probabilistic transfer matrixLirida A. B. Naviner, Kaikai Liu, Hao Cai, Jean-François Naviner. 1-4 [doi]
• Dual function heat-spreading and performance of the IBM/ASTRON DOME 64-bit μServer demonstratorRonald P. Luijten, Andreas C. Döring, Stephan Paredes. 1-4 [doi]
• Single-ended sub-threshold finfet 7T SRAM cell without boosted supplyC. B. Kushwah, Santosh Kumar Vishvakarma, Devesh Dwivedi. 1-4 [doi]
• An on-chip high-voltage current sensor for battery module monitoringChua-Chin Wang, Wen-Je Lu, Sheng-Syong Wang. 1-4 [doi]
• Modeling SRAM dynamic VMINJames Boley, Benton H. Calhoun, Vikas Chandra, Robert C. Aitken. 1-4 [doi]
• Emerging research device roadmap and perspectivesAn Chen. 1-4 [doi]
• A low-jitter clock and data recovery for GDDR5 interface trainingsYuan Fang, Jonas Bargon, Ashok Jaiswal, Klaus Hofmann. 1-4 [doi]
• ALD ZrO2 processes for BEoL device applicationsWenke Weinreich, Konrad Seidel, Patrick Polakowski, Stefan Riedel, Lutz Wilde, Dina H. Triyoso, Mark G. Nolan. 1-4 [doi]
• Highly-reliable TaOx reram technology using automatic forming circuitKen Kawai, Akifumi Kawahara, Ryutaro Yasuhara, Shunsaku Muraoka, Zhiqiang Wei, Ryotaro Azuma, Kouhei Tanabe, Kazuhiko Shimakawa. 1-4 [doi]
• Piezoelectric soft MEMS for tactile sensing and energy harvestingFrancesco Guido, Vincenzo Mariano Mastronardi, Maria Teresa Todaro, Simona Petroni, Massimo de Vittorio. 1-4 [doi]
• Cross logic: A new approach for defect-tolerant circuitsMariem Slimani, Arwa Ben Dhia, Lirida A. B. Naviner. 1-4 [doi]
• A sub-threshold eight transistor (8T) SRAM cell design for stability improvementC. B. Kushwah, Santosh Kumar Vishvakarma. 1-4 [doi]
• Robust bias temperature instability refresh design and methodology for memory cell recoveryGerard Touma, Rouwaida Kanj, Rajiv V. Joshi, Ayman I. Kayssi, Ali Chehab. 1-4 [doi]
• TM processor: Designed for big data, analytics, and cloud environmentsJoshua Friedrich, Hung Q. Le, William J. Starke, Jeff Stuechli, Balaram Sinharoy, Eric J. Fluhr, Daniel M. Dreps, Victor V. Zyuban, Gregory S. Still, Christopher J. Gonzalez, David Hogenmiller, Frank Malgioglio, Ryan Nett, Ruchir Puri, Phillip Restle, David Shan, Zeynep Toprak Deniz, Dieter F. Wendel, Matthew M. Ziegler, Dave Victor. 1-4 [doi]
• RC triggered active ESD clamps; How should they behave under powered conditions?James W. Miller, Michael Stockinger, Scott Ruth, Alex Gerdemann, Melanie Etherton, Mohamed Moosa. 1-5 [doi]
• Design layout optimization in the presence of proximity-dependent stress effectsAkif Sultan, Rashad Ramzan, Derick Wristers. 1-4 [doi]
• Pull-up/pull-down line impedance matching methodology for high speed transmittersArmen Durgaryan, Abraham Balabanyan, Vazgen Melikyan, Khaldoon Abugharbieh. 1-4 [doi]
• FinFET SRAM design challengesDavid Burnett, Sanjay Parihar, Hema Ramamurthy, Sriram Balasubramanian. 1-4 [doi]
• STI fill effect on poly-poly comb ILThuy Dao, Todd Roggenbauer, Jim Colclasure. 1-3 [doi]
• Design of a voltage reference circuit based on subthreshold and triode MOSFETs in 90nm CMOSMahmood Mohammed, Khaldoon Abugharbieh, Mahmoud Abdelfattah, Sanad Kawar. 1-4 [doi]